參數(shù)資料
型號(hào)： TUA4401K
廠商： INFINEON TECHNOLOGIES AG
元件分類： 接收器
英文描述： FM, AUDIO SINGLE CHIP RECEIVER, PQFP44
封裝： MQFP-44
文件頁(yè)數(shù)： 17/41頁(yè)
文件大?。?/td> 990K
代理商： TUA4401K
Functional Description
3 - 16
TUA 4401K
Wireless Components
Specification, 17.02.00
Acknowledge (ACK):
Indicates a successful data transfer. The transmitter will release the bus
after sending 8 bit of data. During the 9th clock cycle the receiver will pull the
SDA line to low level to indicate it has receive the 8 bits of data correctly.
Data Transfer Write Mode:
To start the communication, the bus master must initiate a start condition,
followed by the 8bit chip address (write). The chip address for the TUA 4401
is fixed as ”1100110” (MSB at first). The last bit (LSB=A0) of the chip
address byte defines the type of operation to be performed:
A0=1, a read operation is selected and A0=0, a write operation is selected.
After this comparison the TUA 4401 will generate an ACK.
After this device addressing the desired subaddress byte and data bytes
must be followed. The subaddresses determines which one of the 9 data
bytes (00H...07H, 0BH) is transmitted first. At the end of data transition the
master must be generate the stop condition.
Data Transfer Read Mode:
To start the communication in the read mode, the bus master must initiate a
start condition, followed by the 8bit chip address (write: A0=0), followed by
the sub address read (82H/83H), followed by the chip address (read: A0=1).
After that procedure the 16bit/8bit data register 82H/83H is read out. After
the first 8 bit read out, the uP mandatory send LOW during the ACK-clock.
After the second 8 bit read out the uP mandatory send HIGH during the
ACK-clock. At the end of data transition the master must be generate the
stop condition.
10.PLL Synthesizer
R / N Counter
The TUA 4401K has 2 identical 16bit counter for R and N path. Input fre-
quency for the R-counter is the buffered XTAL-frequency (61.5MHz). Tuning
steps can be selected by the 16bit R-counter from fR= 6.25kHz...100kHz.
Input frequency for the N-counter is the buffered LO-frequency (in FM mode
98.2MHz...118.7MHz).
Three State Phase Comparator
The phase comparator generates a phase error signal according to phase
difference between fR (R counter output) and fN (N counter output).This
phase error signal drives the charge pump current generator.
Charge Pump
The charge pump generates signed pulses of current. 4 current values are
available.
Loop Amp
The integrated rail to rail loop amplifier allows an active loop filter design with
external components.
Two modes are available with status bit D11: high speed and normal mode.
相關(guān)PDF資料
PDF描述
TUA4401 FM, AUDIO SINGLE CHIP RECEIVER, PQFP64
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