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參數(shù)資料
型號: TWR-MCF51JE-KIT
廠商: Freescale Semiconductor
文件頁數(shù): 13/47頁
文件大?。?/td> 0K
描述: TOWER SYSTEM KIT MCF51JE
標(biāo)準(zhǔn)包裝: 1
系列: ColdFire®, Flexis™
類型: MCU
適用于相關(guān)產(chǎn)品: Freescale 電源塔系統(tǒng),MCF51JE
所含物品: 4 個板,線纜,文檔,DVD
MCF51JE256 Datasheet, Rev. 4
Preliminary Electrical Characteristics
Freescale Semiconductor
20
11
RPU
Pull-up resistors
all digital inputs, when
enabled
17.5
52.5
k
P
12
RPD
Internal
pull-down
resistors4
17.5
52.5
k
P
13
IIC
DC injection
current 5, 6, 7
Single pin limit
VSS > VIN > VDD
–0.2
0.2
mA
D
Total MCU limit, includes
sum of all stressed pins
VSS > VIN > VDD
–5
5
mA
14
CIn
Input Capacitance, all pins
8
pF
C
15
VRAM
RAM retention voltage
0.6
1.0
V
C
16
VPOR
POR re-arm voltage8
—0.9
1.4
1.79
V
C
17
tPOR
POR re-arm time
10
sD
18
VLVDH Low-voltage detection threshold — high range
9
VDD falling
2.11
2.16
2.22
V
P
VDD rising
2.16
2.21
2.27
V
P
19
VLVDL Low-voltage detection threshold — low range
9
VDD falling
1.80
1.82
1.91
V
P
VDD rising
1.86
1.90
1.99
V
P
20
VLVWH Low-voltage warning threshold — high range
9
VDD falling
2.36
2.46
2.56
VP
VDD rising
2.36
2.46
2.56
V
P
21
VLVWL Low-voltage warning threshold — low range
9
VDD falling
2.11
2.16
2.22
V
P
VDD rising
2.16
2.21
2.27
V
P
22
Vhys
Low-voltage inhibit reset/recover
hysteresis10
——
50
mV
C
23
VBG
Bandgap Voltage Reference11
1.145
1.17
1.195
V
P
1
Typical values are measured at 25
C. Characterized, not tested
2
As the supply voltage rises, the LVD circuit will hold the MCU in reset until the supply has risen above VLVDL.
3
Does not include analog module pins. Dedicated analog pins should not be pulled to VDD or VSS and should be left floating when not used
to reduce current leakage.
4
Measured with VIn = VDD.
5
All functional non-supply pins are internally clamped to VSS and VDD,except PTD1.
6
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values
for positive and negative clamp voltages, then use the larger of the two values.
7
Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current conditions. If positive
injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out
of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU
is not consuming power. Examples are: if no system clock is present, or if clock rate is very low (which would reduce overall power
consumption).
Table 9. DC Characteristics (continued)
#
Symbol
Characteristic
Condition
Minimum Typical1 Maximum
Unit
C
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