參數(shù)資料
型號(hào)： TWR-MCF51JE-KIT
廠商： Freescale Semiconductor
文件頁數(shù)： 18/47頁
文件大小： 0K
描述： TOWER SYSTEM KIT MCF51JE
標(biāo)準(zhǔn)包裝： 1
系列： ColdFire®, Flexis™
類型： MCU
適用于相關(guān)產(chǎn)品： Freescale 電源塔系統(tǒng)，MCF51JE
所含物品： 4 個(gè)板，線纜，文檔，DVD
Preliminary Electrical Characteristics
MCF51JE256 Datasheet, Rev. 4
Freescale Semiconductor
25
Table 14. DAC 12-Bit Operating Behaviors
#
Characteristic
Symbol
Minimum
Typical Maximum
Unit
C
Notes
1
Resolution
N
12
—
12
bit
T
2
Supply current low-power mode
IDDA_DAC
LP
—50
100
AT
3
Supply current high-power mode
IDDA_DAC
HP
—
345
500
AT
4
Full-scale Settling time (
1 LSB)
(0x080 to 0xF7F or 0xF7F to 0x080)
low-power mode
TsFSLP
——
200
sT
VDDA = 3 V or 2.2 V
VREFSEL = 1
Temperature
= 25°C
5
Full-scale Settling time (
1 LSB)
(0x080 to 0xF7F or 0xF7F to 0x080)
high-power mode
TsFSHP
——
30
sT
VDDA = 3 V or 2.2 V
VREFSEL = 1
Temperature
= 25°C
6
Code-to-code Settling time (
1 LSB)
(0xBF8 to 0xC08 or 0xC08 to
0xBF8) low-power mode
TsC-CLP
——
5
s
T
VDDA = 3 V or 2.2 V
VREFSEL = 1
Temperature = 25°C
7
Code-to-code Settling time (
1 LSB)
(0xBF8 to 0xC08 or 0xC08 to
0xBF8) high-power mode
TsC-CHP
—1
—
s
T
VDDA = 3 V or 2.2 V
VREFSEL = 1
Temperature = 25°C
8
DAC output voltage range low
(high-power mode, no load, DAC set
to 0, 3 V at room temperature)
Vdacoutl
——
100
mV
T
9
DAC output voltage range high
(high-power mode, no load, DAC set
to 0x0FFF)
Vdacouth VDACR–100
—
mV
T
10
Integral non-linearity error
INL
—
8LSB
T
11
Differential non-linearity error
VDACR is > 2.4 V
DNL
—
±1
LSB
T
12
Offset error
EO
—±0.4
±3
%FSR
T
Calculated by a best fit
curve from VSS +
100mV to VREFH
–100mV
13
Gain error (VREF = Vext = VDD)
EG
—
±0.1
±0.5
%FSR
T
Calculated by a best fit
curve from VSS +
100mV to VREFH
–100mV
14
Power supply rejection ratio
VDD 2.4 V
PSRR
60
—
dB
T
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