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參數(shù)資料
| 型號： | UCC3580N-3 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.2 A SWITCHING CONTROLLER, 430 kHz SWITCHING FREQ-MAX, PDIP16 |
| 封裝： | GREEN, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 14/19頁 |
| 文件大?。?/td> | 761K |
| 代理商： | UCC3580N-3 |
4
UCC1580-1,-2,-3,-4
UCC2580-1,-2,-3,-4
UCC3580-1,-2,-3,-4
ELECTRICAL CHARACTERISTICSUnless otherwise stated, all specifications are over the full temperature range, VDD =
12V, R1 = 18.2 k
W , R2 = 4.41 kW ,CT = 130 pF, R3 = 100 kW ,COUT1 =0F,COUT2 =0F.TA = 0°C to 70°C for the UCC3580,
-40°C to 85°C for the UCC2580, -55°C to 125°C for the UCC1580, TA =TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Output Drivers Section (cont.)
Delay 1 OUT2 to OUT1
R3 = 100 k
W,COUT1 =COUT2 = 15 pF
90
120
160
ns
TA =TJ = 25°C
100
120
140
ns
Delay 2 OUT1 to OUT2
R3 = 100 k
W,COUT1 =COUT2 = 15 pF
110
170
250
ns
TA =TJ = 25°C
140
170
200
ns
Reference Section
REF
IREF = 0
4.875
5
5.125
V
Load Regulation
IREF =0mAto1mA
1
20
mV
Line Regulation
VDD = 10 V to 14 V
1
20
mV
Note 1: Guaranteed by design. Not 100% tested in production.
CLK: Oscillator clock output pin from a low impedance
CMOS driver. CLK is high during guaranteed off time.
CLK can be used to synchronized up to five other
UCC3580 PWMs.
DELAY: A resistor from DELAY to GND programs the
nonoverlap delay between OUT1 and OUT2. The delay
times, Delay1 and Delay2, are shown in Figure 1 and are
as follows:
Delay
pF R
11 1
3
=
.
Delay2 is designed to be larger than Delay1 by a ratio
shown in Figure 2.
EAIN: Inverting
input
to
the
error
amplifier.
The
noninverting input of the error amplifier is internally set to
2.5V. EAIN is used for feedback and loop compensation.
EAOUT: Output of the error amplifier and input to the
PWM
comparator.
Loop
compensation
components
connect from EAOUT to EAIN.
GND: Signal Ground.
LINE: Hysteretic comparator input. Thresholds are 5.0V
and 4.5V. Used to sense input line voltage and turn off
OUT1 when the line is low.
OSC1 & OSC2: Oscillator programming pins. A resistor
connects each pin to a timing capacitor. The resistor
connected to OSC1 sets maximum on time. The resistor
connected to OSC2 controls guaranteed off time. The
combined total sets frequency with the timing capacitor.
Frequency and maximum duty cycle are approximately
given by:
() (
)
Fre que ncy
1.44
R1 R
CT
=
+
227
pF
Ma ximum Duty Cycle
R1
R1 R2
=
+
Maximum Duty Cycle for OUT1 is slightly less due to
Delay1 which is programmed by R3.
OUT1: Gate drive output for the main switch capable of
sourcing up to 0.5A and sinking 1A.
OUT2: Gate drive output for the auxiliary switch with
0.3A drive current capability.
PGND: Ground connection for the gate drivers. Connect
PGND to GND at a single point so that no high frequency
components of the output switching currents are in the
ground plane on the circuit board.
RAMP: A resistor (R4) from RAMP to the input voltage
and a capacitor (CR) from RAMP to GND programs the
feedforward ramp signal. RAMP is discharged to GND
when CLK is high and allowed to charge when CLK is
low. RAMP is the line feedforward sawtooth signal for the
PWM comparator. Assuming the input voltage is much
greater than 3.3V, the ramp is very linear. A flux
comparator compares the ramp signal to 3.3V to limit the
maximum allowable volt-second product:
Volt-Second Product Clamp = 3.3 R4 CR.
REF: Precision 5.0V reference pin. REF can supply up to
5mA to external circuits. REF is off until VDD exceeds 9V
(–1 and –3 versions) or activates the 15V clamp (–2 and
–4 versions) and turns off again when VDD droops below
8.5V. Bypass REF to GND with a 1
mF capacitor.
SHTDWN: Comparator input to stop the chip. The
threshold is 0.5V. When the chip is stopped, OUT1 is low
and OUT2 continues to oscillate with guaranteed off time
equal to two non-overlap delay times. OUT2 continues to
switch after SHTDWN is asserted until the voltage on
VDD falls below VCS (typically 4 V) in order to discharge
the clamp capacitor.
PIN DESCRIPTIONS
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| UCC3580N-3G4 | 功能描述:電壓模式 PWM 控制器 Single Ended Active Clamp/Reset PWM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓撲結構:Buck 輸出電壓:34 V 輸出電流: 開關頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| UCC3580N-4 | 功能描述:電壓模式 PWM 控制器 Single Ended Active Clamp/Reset PWM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓撲結構:Buck 輸出電壓:34 V 輸出電流: 開關頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| UCC3580N-4G4 | 功能描述:電壓模式 PWM 控制器 Single Ended Active Clamp/Reset PWM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓撲結構:Buck 輸出電壓:34 V 輸出電流: 開關頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| UCC3580Q-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| UCC3580Q-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
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