- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379480 > UCD7230_07 (Texas Instruments, Inc.) Digital Control Compatible Synchronous Buck Gate Drivers with Current Sense Conditioning Amplifier PDF資料下載
參數(shù)資料
| 型號： | UCD7230_07 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Digital Control Compatible Synchronous Buck Gate Drivers with Current Sense Conditioning Amplifier |
| 中文描述： | 數(shù)字控制兼容同步降壓門驅(qū)動(dòng)器，電流調(diào)節(jié)放大器檢測 |
| 文件頁數(shù)： | 9/33頁 |
| 文件大?。?/td> | 874K |
| 代理商： | UCD7230_07 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
www.ti.com
DEVICE INFORMATION
UCD7230
SLUS741C–NOVEMBER 2006–REVISED MARCH 2007
TERMINAL FUNCTIONS
TERMINAL
UCD7230
I/O
DESCRIPTION
NAME
HTSSOP-
20
QFN-20
Supply input pin to power the internal circuitry except the driver outputs. The
UCD7230 accepts an input range of 4.5 V to 15.5 V.
Synchronous Rectifier Enable. The SRE pin is a high impedance digital input
capable of accepting 3.3-V logic level signals, used to disable the synchronous
rectifier switch. The synchronous rectifier is disabled when this signal is low. A
Schmitt trigger input comparator desensitizes this pin from external noise.
The IN pin is a high impedance digital input capable of accepting 3.3-V logic
level signals up to 2 MHz. A Schmitt trigger input comparator desensitizes this
pin from external noise.
Regulated 3.3-V rail. The onboard linear voltage regulator is capable of
sourcing up to 10 mA of current. Bypass with 0.22-
μ
F ceramic capacitance
from this pin to analog ground, AGND.
Analog ground return.
Requires a resistor to AGND for setting the current sense blanking time for
both the high-side and low-side current sense comparators. The value of this
resistor in conjunction with the resistor in series with the CS+ pin sets the high
side current sense threshold.
Output current limit threshold set pin. The output current threshold is 1/10
th
of
the value set on this pin. If left floating the voltage on this pin is 0.55 V. The
voltage on the ILIM pin can range from 0.25 V to 1V to set the threshold from
25 mV to 100 mV.
Current Limit Flag. The CLF signal is a 3.3-V digital output which is latched
high after an over current event, triggered by either of the two current sense
comparators and reset after two rising edges received on the IN pin.
Sets the current sense linear amplifier “Zero” output level. The default value is
0.6 V which allows negative current measurement.
Current sense linear amplifier output. The output voltage level on this pin
represents the average output current. Any value below the level on the I0 pin
represents negative output current.
Non-inverting input of the output current sense amplifier and current limit
comparator.
Inverting input of the output current sense amplifier and current limit
comparator.
Power ground return. This pin should be connected close to the source of the
low-side synchronous rectifier MOSFET.
The low-side high-current TrueDrive driver output. Drives the gate of the
low-side synchronous MOSFET between PVDD and PGND.
Supply pin provides power for the output drivers. It is not connected internally
to the VDD supply rail. The bypass capacitor for this pin should be returned to
PGND.
Floating OUT1 driver supply powered by an external Schottky diode from the
PVDD pin during the synchronous MOSFET on time.
The high-side high-current TrueDrive driver output. Drives the gate of the
high-side buck MOSFET between SW and BST.
OUT1 gate drive return and square wave input to output inductor.
Supply pin for the high-side current sense comparator.
Non-inverting Input for the high side current sense comparator. A resistor
connected between this pin and the high side MOSFET drain, in conjunction
with the DLY resistor sets the high-side current limit threshold.
VDD
1
18
-
SRE
2
19
I
IN
3
20
I
3V3
4
1
O
AGND
5
2
-
DLY
6
3
I
ILIM
7
4
I
CLF
8
5
O
IO
9
6
I
AO
10
7
O
POS
11
8
I
NEG
12
9
I
PGND
13
10
-
OUT2
14
11
I
PVDD
15
12
-
BST
16
13
I
OUT1
17
14
I
SW
CSBIAS
18
19
15
16
I/O
I
CS+
20
17
I
9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UCD7230RGW | Digital Control Compatible Synchronous Buck Gate Drivers with Current Sense Conditioning Amplifier |
| UCD9240PHR | UCD9240 Digital Point of Load System Controller |
| UCD9240RHBR | UCD9240 Digital Point of Load System Controller |
| UCD9501 | Digital Signal Processors |
| UCX823A | High Speed PWM Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UCD7230A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Control Compatible Synchronous Buck Gate Driver with Current Sense Conditioning Amplifier |
| UCD7230ARGWR | 功能描述:功率驅(qū)動(dòng)器IC Dig Pwr Comp Synch Buck Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| UCD7230ARGWT | 功能描述:功率驅(qū)動(dòng)器IC Dig Pwr Comp Synch Buck Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| UCD7230PWP | 功能描述:DC/DC 開關(guān)控制器 Dig Pwr Comp Synch Buck RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
| UCD7230PWPG4 | 功能描述:DC/DC 開關(guān)控制器 Dig Pwr Comp Synch Buck Drvr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。