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Startup Handshaking
The UCD7230 has a built-in handshaking feature to facilitate efficient start-up of the digitally controlled power
supply. At start-up the CLF flag is held high until all the internal and external supply voltages of the device are
within their operating range. Once the supply voltages are within acceptable limits, CLF goes low and the device
will process input commands. The digital controller should monitor CLF at start-up and wait for CLF to go low
before sending pwm information to the UCD7230.
Thermal Management
The usefulness of a driver is greatly affected by the drive power requirements of the load and the thermal
characteristics of the device package. In order for a power driver to be used over a particular temperature range,
the package must allow for the efficient removal of the heat while keeping the junction temperature within rated
limits. The UCD7230 is available in PowerPAD HTSSOP and QFN packages to cover a range of application
requirements. Both have the exposed pads to remove thermal energy from the semiconductor junction.
REFERENCES
1. Power Supply Seminar SEM-1600 Topic 6:
A Practical Introduction to Digital Power Supply Control
, by
Laszlo Balogh, Texas Instruments Literature No. SLUP224
2. Power Supply Seminar SEM–1400 Topic 2:
Design and Application Guide for High Speed MOSFET Gate
Drive Circuits
, by Laszlo Balogh, Texas Instruments Literature No. SLUP133.
3. Technical Brief,
PowerPad Thermally Enhanced Package
, Texas Instruments Literature No. SLMA002
4. Application Brief,
PowerPAD Made Easy
, Texas Instruments Literature No. SLMA004
RELATED PRODUCTS
UCD7230
SLUS741C–NOVEMBER 2006–REVISED MARCH 2007
APPLICATION INFORMATION (continued)
If either comparator threshold is exceeded, OUT1 is immediately turned off for the remainder of the cycle and
CLF is asserted true. Upon the rising edge of IN, the switches resume normal operation, but the CLF assertion
is maintained. If a fault is not detected in this switching cycle, then the next rising edge of IN removes the CLF
assertion. However, if one of the comparators detects a fault, then CLF assertion continues. It is the privilege of
the control device to monitor CLF and decide how to handle the fault condition. In the mean while, the protection
comparators protect the power MOSFET switches on a cycle-by-cycle basis. If the output-sense comparator
(POS - NEG) detects continuous over-current, then the driver assumes 0% duty cycle until the current drops to a
safe value. Note that when a fault condition causes OUT1 to be driven low, OUT2 behaves as if the input pulse
had been terminated normally. In some fault conditions, it is advantageous to drive OUT2 low. SRE can be used
to cause OUT2 to remain low at the discretion of the control chip. This can be used to achieve faster discharge
of the inductor and also to fully disconnect the converter from the output voltage.
As illustrated in Reference [3 & 4], the PowerPAD packages offer a lead-frame die pad that is exposed at the
base of the package. This pad is soldered to the copper on the PC board (PCB) directly underneath the device
package, reducing the
θ
JA
down to 38
°
C/W. The PC board must be designed with thermal lands and thermal
vias to complete the heat removal subsystem, as summarized in Reference [3].
Note that the PowerPAD is not directly connected to any leads of the package. However, it is electrically and
thermally connected to the substrate which is the ground of the device. The PowerPAD should be connected
to the quiet ground of the circuit.
RELATED PRODUCTS
PRODUCT
UCD9501
UCD9111
UCD9112
DESCRIPTION
Digital power controller for high performance multi-loop applications
Digital power controller for power supply applications
Digital power controller for power supply applications
FEATURES
16