參數(shù)資料
型號: UPC1851B
廠商: NEC Corp.
英文描述: CONN SEALING FOR WALL RCPT #10
中文描述: I2C總線兼容美國的多邊貿易體制處理LSI
文件頁數(shù): 42/60頁
文件大小: 447K
代理商: UPC1851B
42
μ
PC1851B
Data Sheet S13417EJ2V0DS00
7. USAGE CAUTIONS
7.1 Caution on Shock Noise Reduction
When switching the power ON/OFF, use the external mute (approx. 200 ms) in order to minimize shock noise
(Refer to section
4.3 (2) Mute
).
7.2 Supply Voltage
Pass data through the I
2
C bus only after stabilizing the supply voltage of the entire application system.
7.3 Impedance of Input and Output Pins
Table 7-1. Impedance of Input and Output Pins
Input pin
Output pin
Symbol
Description
Impedance
Symbol
Description
Impedance
COM
Composite signal input
80 k
SOT
SAP single input
360
SI
SAP single input
ROT
R-channel output
15
EL1, EL2
External L-channel input
LOT
L-channel output
ER1, ER2
External R-channel input
MOR
R-channel matrix output
MOL
L-channel matrix output
FOR
R-channel fixed output
FOL
L-channel fixed output
7.4 Drive Capability of Output Pins
Table 7-2. Drive Capability of Output Pins
Pin symbol
Pin description
Output pin-GND Connection Resistance
Drive capability
SOT
SAP single output
10 k
3-k
load or less
ROT
R-channel output
700-
load or less
LOT
L-channel output
MOR
R-channel matrix output
MOL
L-channel matrix output
FOR
R-channel fixed output
FOL
L-channel fixed output
Remark
If the load capacitance of the output pins (SOT, ROT, LOT, MOR, MOL, FOR, FOL pins) exceeds
100 pF, parasitic oscillation may occur. In this case, connect a resistor between the output pins
and the load capacitance. Bear in mind that the load capacitance is changed by wiring pattern on
the printed circuit board.
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