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參數(shù)資料
| 型號： | UPC1854A |
| 廠商： | NEC Corp. |
| 英文描述： | I2C BUS-COMPATIBLE US MTS PROCESSING LSI |
| 中文描述： | I2C總線兼容美國的多邊貿(mào)易體制處理LSI |
| 文件頁數(shù)： | 22/48頁 |
| 文件大小： | 251K |
| 代理商： | UPC1854A |
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μ
PC1854A
22
Data Sheet S12816EJ3V0DS00
4. I
2
C BUS COMMANDS
4.1 Subaddress List
(1) Write register (command list)
Subaddress
MSB
D7
LSB
D0
D6
D5
D4
D3
D2
D1
00H
0
During noise
detection
Stereo/SAP
output stop
0: SAP OFF
1: Stereo,
SAP OFF
Input level setting
01H
0
f
H
monitor
ON/OFF
0: OFF
1: ON
Stereo VCO setting
02H
0
Pilot canceler
ON/OFF
0: ON
1: OFF
Filter setting
03H
0
0
Low-band separation setting
04H
0
0
High-band separation setting
05H
0
5 f
H
monitor
ON/OFF
0: OFF
1: ON
SAP VCO setting
06H
0
0
Normal track
output select 1 output select 2 switch
Note
0: SAP
0: SAP
1:
External SAP
1: Monaural
Normal track
SAP1/SAP2
Stereo/SAP
switch
0: Stereo
1: SAP
Forced monaural
Mute ON/OFF
ON/OFF
0: OFF
1: ON
0: SAP1
1: SAP2
0: ON
1: OFF
Note
Output when SAP1 or SAP2 is selected is as follows:
LOT pin (L-channel output)
ROT pin (R-channel output)
SAP1
SAP
SAP2
Monaural (L+R)
SAP
Remark
The initial value of write register after power-on reset
Mute register (subaddress 06H, bit D0) = 0 (Mute: ON)
Other registers = undefined (setting properly after power-on reset)
(2) Read register
MSB
D7
LSB
D0
D6
D5
D4
D3
D2
D1
Power-on reset
1: Detection
Broadcast status
Noise detection
0: Not availableStereo broadcast SAP broadcast
1: Available
reception
0: Not available
1: Available
Reception status
1
1
Stereo pilot
0: Not available
1: Available
SAP signal
0: Not available
1: Available
reception
0: Not available
1: Available
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