參數資料
型號: UPC1854A
廠商: NEC Corp.
英文描述: I2C BUS-COMPATIBLE US MTS PROCESSING LSI
中文描述: I2C總線兼容美國的多邊貿易體制處理LSI
文件頁數: 32/48頁
文件大小: 251K
代理商: UPC1854A
μ
PC1854A
32
Data Sheet S12816EJ3V0DS00
6. USAGE CAUTIONS
6.1 Caution on Shock Noise Reduction
When switching the power ON/OFF, use the mute function (approx. 200 ms) outside the
μ
PC1854A in order to
minimize shock noise.
6.2 Supply Voltage
Pass data through the I
2
C bus only after stabilizing the supply voltage of the entire application system.
6.3 Impedance of Input and Output Pins
Table 6-1. Impedance of Input and Output Pins
Input pin
Output pin
Symbol
Description
Impedance
Symbol
Description
Impedance
COM
Composite signal input
80 k
SOT
SAP single output
360
SI
SAP single input
NOT
Normal output
15
ESA
External SAP input
ROT
R-channel output
LOT
L-channel output
6.4 Drive Capability of Output Pins
Table 6-2. Drive Capability of Output Pins
Pin symbol
Pin description
Output pin-GND Connection Resistance
Drive capability
SOT
SAP single output
10 k
3-k
load or less
NOT
Normal output
700-
load or less
ROT
R-channel output
LOT
L-channel output
Remark
If the load capacitance of the output pins (SOT, NOT, ROT, LOT pins) exceeds 100 pF, parasitic
oscillation may occur. In this case, connect a resistor between the output pins and the load capaci-
tance. Bear in mind that the load capacitance is changed by wiring pattern on the printed circuit
board.
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