參數(shù)資料
    型號: UPD120N33T1B-AZ
    元件分類: 固定正電壓單路輸出LDO穩(wěn)壓器
    英文描述: 3.3 V FIXED POSITIVE LDO REGULATOR, 0.6 V DROPOUT, SSO3
    封裝: LEAD FREE, SC-62, 3 PIN
    文件頁數(shù): 10/15頁
    文件大小: 228K
    代理商: UPD120N33T1B-AZ
    Data Sheet
    S17145EJ3V0DS
    4
    μPD120Nxx Series
    ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified.)
    Rating
    Parameter
    Symbol
    μ PD120NxxTA
    μ PD120NxxT1B
    Unit
    Input Voltage
    VIN
    0.3 to +6
    V
    Power Dissipation
    Note1
    PT
    180/510
    Note2
    400/2000
    Note3
    mW
    Operating Ambient Temperature
    TA
    –40 to +85
    °C
    Operating Junction Temperature
    TJ
    –40 to +150
    °C
    Storage Temperature
    Tstg
    –55 to +150
    °C
    Thermal Resistance (junction to ambient)
    Rth(J-A)
    695/245
    Note2
    315/62.5
    Note3
    °C/W
    Note 1. Internally limited. When the operating junction temperature rises over 150
    °C, the internal circuit shuts down
    the output voltage.
    2. Mounted on ceramic substrate of 75 mm
    2 x 0.7 mm
    3. Mounted on ceramic substrate of 16 cm
    2 x 0.7 mm
    Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
    parameter. That is, the absolute maximum ratings are rated values at which the product is on the
    verge of suffering physical damage, and therefore the product must be used under conditions that
    ensure that the absolute maximum ratings are not exceeded.
    STANDARD CONNECTION
    D2
    D1
    CIN
    COUT
    INPUT
    OUTPUT
    PD120Nxx
    μ
    CIN: 0.1
    μF or higher. Set this value according to the length of the line between the regulator and INPUT pin. Be sure
    to connect CIN to prevent parasitic oscillation. If using a laminated ceramic capacitor, it is necessary to ensure
    that CIN is 0.1
    μF or higher for the voltage and temperature range to be used.
    COUT: 10
    μF or higher. Be sure to connect COUT to prevent oscillation and improve excessive load regulation. Place
    CIN and COUT as close as possible to the IC pins (within 2 cm). Be sure to use the capacitor of 10
    μF or higher
    of capacity values and 1 to 8
    Ω of equivalent series resistance under an operating condition.
    D1: If the OUTPUT pin has a higher voltage than the INPUT pin, connect a diode.
    D2: If the OUTPUT pin has a lower voltage than the GND pin, connect a schottky barrier diode.
    Caution Make sure that no voltage is applied to the OUTPUT pin from external.
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