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參數(shù)資料
| 型號： | UPD121A10T1F-E2-AT |
| 元件分類： | 固定正電壓單路輸出標準穩(wěn)壓器 |
| 英文描述： | 1 V FIXED POSITIVE REGULATOR, PSSO4 |
| 封裝： | LEAD FREE, TO-252, MP-3ZK, 6 PIN |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 208K |
| 代理商： | UPD121A10T1F-E2-AT |
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2007
MOS INTEGRATED CIRCUIT
μ PD121A10
2-POWER SUPPLY INPUT METHOD
1.0 V/2.0 A REGULATOR
DATA SHEET
Document No. G18843EJ1V0DS00 (1st edition)
Date Published July 2007 NS
Printed in Japan
DESCRIPTION
μ PD121A10 is the CMOS regulator which can output 2.0 A current. This regulator is suitable for power supply for 1.0
V ASIC core, for example our companies’ CB-90 (90 nm process LSI) etc. The dropout voltage is made small (0.7 V
MAX. (IO = 1.0 A) by dividing bias voltage (VDD) from input voltage (VIN). Therefore this product can output under the
conditions, VIN
≥ 1.62 V (VDD ≥ 4.0 V). Output voltage can be adjustable between 0.95 and 1.15 V.
FEATURES
Output Current: 2.0 A
Output Voltage: 0.95 to 1.15 V
Bias Voltage: 4.0 to 5.5 V
Reference Voltage Tolerance: VREF ± 10 mV (TJ = 25°C)
Low Dropout Voltage: VDIF = 0.7 V MAX. (IO = 1.0 A)
On-chip over-current protection circuit
On-chip thermal shut down circuit
APPLICATIONS
This regulator is suitable for low power supply voltage IC,
for example core of CB-90 (90 nm process LSI) etc.
BLOCK DIAGRAM
+
VDD
INPUT
OUTPUT
SENSE
GND
Reference
voltage
Constant
current
Over-current
protection
Thermal
shut down
Error
amp.
Buffer
Triming
PIN CONFIGURATION (Marking Side)
5-PIN TO-252 (5-PIN MP-3ZK)
123 4 5
6
Note No.3 pin is cut and can not be connected to
substrate. No.6 is Fin and common to GND pin.
1. INPUT
2. VDD (ON/OFF)
3. GND
Note
4. SENSE
5. OUTPUT
6. GND (Fin)
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