參數(shù)資料
型號: UPD17201A
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS
中文描述: 4位單片機與LCD控制器/驅動器和A / D轉換器紅外遙控遞質
文件頁數(shù): 14/120頁
文件大?。?/td> 516K
代理商: UPD17201A
μ
PD17201A, 17207
14
4. MEMORY SPACE
4.1 PROGRAM COUNTER (PC)
The program counter (PC) specifies an address of the program memory (ROM).
The program counter is a 12-bit binary counter as shown in Fig. 4-1.
Its contents are initialized to address 0000H at reset.
Fig. 4-1 Configuration of Program Counter
4.2 PROGRAM MEMORY (ROM)
The configuration of the program memory of the
μ
PD17201A/17207 is as follows:
Part Number
Capacity
Address
μ
PD17201A
3072 x 16 bits
0000H-0BFFH
μ
PD17207
4096 x 16 bits
0000H-0FFFH
The program memory stores a program, interrupt vector table, and fixed data table.
The program memory is addressed by the program counter.
Fig. 4-2 shows the program memory map. The entire range of the program memory can be addressed by the BD
addr, BR @AR, CALL @AR, MOVT DBF, and @AR instructions. Note, however, that the subroutine entry addresses
that can be specified by the CALL addr instruction are from 0000H to 07FFH.
Fig. 4-2 Program Memory Map
MSB
Page
PC
PC11 PC10
PC9
PC8
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
LSB
Address
0 0 0 0 H
0 0 0 1 H
0 0 0 2 H
0 0 0 3 H
0 0 0 4 H
0 7 F F H
0 B F F H
0 F F F H
16 bits
Reset start address
Serial interface interrupt vector
Watch timer interrupt vector
External input (INT) interrupt vector
8-bit timer interrupt vector
( PD17201A)
Page 0
Page 1
Subroutine entry
addresses for CALL
addr instruction
Branch addresses for
BR addr instruction
Branch addresses for
BR @AR instruction
Subroutine entry
addresses for CALL
@AR instruction
Table reference
addresses for MOVT
DBF, @AR instruction
( PD17207)
相關PDF資料
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UPD17201AGF 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS
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