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參數(shù)資料
| 型號： | UPD4482162 |
| 廠商： | NEC Corp. |
| 英文描述： | 8M-BIT CMOS SYNCHRONOUS FAST SRAM PIPELINED OPERATION SINGLE CYCLE DESELECT |
| 中文描述： | 800萬位CMOS同步快速靜態(tài)存儲器流水線操作單周期取消選擇 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大?。?/td> | 445K |
| 代理商： | UPD4482162 |
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Data Sheet M14522EJ3V0DS
μ
PD4482162, 4482182, 4482322, 4482362
Pin Identification (
μ
PD4482322GF,
μ
PD4482362GF)
Symbol
Pin No.
Description
A0 to A17
37, 36, 35, 34, 33, 32, 100, 99, 82, 81, 44, 45,
46, 47, 48, 49, 50, 43
Synchronous Address Input
I/O1 to I/O32
52, 53, 56, 57, 58, 59, 62, 63, 68, 69, 72, 73, 74,
75, 78, 79, 2, 3, 6, 7, 8, 9, 12, 13, 18, 19, 22, 23,
24, 25, 28, 29
Synchronous Data In,
Synchronous / Asynchronous Data Out
I/OP1, NC
Note
51
Synchronous Data In (Parity),
I/OP2, NC
Note
80
Synchronous / Asynchronous Data Out (Parity)
I/OP3, NC
Note
1
I/OP4, NC
Note
30
/ADV
83
Synchronous Burst Address Advance Input
/AP
84
Synchronous Address Status Processor Input
/AC
85
Synchronous Address Status Controller Input
/CE, CE2, /CE2
98, 97, 92
Synchronous Chip Enable Input
/BWE1 to /BWE4, /BWE
93, 94, 95, 96, 87
Synchronous Byte Write Enable Input
/GW
88
Synchronous Global Write Input
/G
86
Asynchronous Output Enable Input
CLK
89
Clock Input
MODE
31
Asynchronous Burst Sequence Select Input
Do not change state during normal operation
ZZ
64
Asynchronous Power Down State Input
V
DD
15, 41, 65, 91
Power Supply
V
SS
17, 40, 67, 90
Ground
V
DD
Q
4, 11, 20, 27, 54, 61, 70, 77
Output Buffer Power Supply
V
SS
Q
5, 10, 21, 26, 55, 60, 71, 76
Output Buffer Ground
NC
14, 16, 38, 39, 42, 66
No Connection
Note
NC (No Connection) is used in the
μ
PD4482322GF.
I/OP1 to I/OP4 are used in the
μ
PD4482362GF.
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