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參數(shù)資料
| 型號： | UPD6P4BMC-5A4 |
| 廠商： | NEC Corp. |
| 英文描述： | MS3112E22-32S |
| 中文描述： | 4位單片機的紅外遙控傳輸 |
| 文件頁數(shù)： | 17/32頁 |
| 文件大小： | 187K |
| 代理商： | UPD6P4BMC-5A4 |
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Data Sheet U13594EJ2V0DS00
17
μ
PD6P4B
AC Characteristics (T
A
= –40 to +85
°
C, V
DD
= 2.2 to 3.6 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Instruction execution time t
CY
15.9
27
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
V
DD
= 2.7 to 3.6 V
Note 1
7.9
27
K
I
, S
0
, S
1
high-level width
t
H
10
When canceling Standby mode
HALT mode
10
STOP mode
Note 2
RESET low-level width
t
RSL
10
Notes 1.
When using at f
X
= 4 MHz or higher, it is necessary to design the application circuit so that the RESET
pin goes low when the supply voltage is less than 2.7 V.
2.
10 + 286/f
X
+ oscillation growth time
Remark
t
CY
= 64/f
X
(f
X
: System clock oscillator frequency)
POC Circuit
Note 1
(T
A
= –20 to +70
°
C)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
POC-detected voltage
Note 2
V
POC
1.8
2.0
2.2
V
POC circuit current
I
POC
1.2
1.5
μ
A
Notes 1.
Operates effectively under the conditions of f
X
= 2.4 to 4 MHz.
2.
Refers to the voltage with which the POC circuit cancels an internal reset. If V
POC
< V
DD
, the internal
reset is canceled.
From the time of V
POC
≥
V
DD
until the internal reset takes effect, lag of up to 1 ms occurs. When the
period of V
POC
≥
V
DD
lasts less than 1 ms, the internal reset may not take effect.
System Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 2.2 to 3.6 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Oscillator frequency
f
X
2.4
3.64
4.0
MHz
(ceramic resonator)
Note
2.4
3.64
8.0
MHz
Note
When using at f
X
= 4 MHz or higher, it is necessary to design the application circuit so that the RESET
pin goes low when the supply voltage is less than 2.7 V.
An external circuit example
X
IN
X
OUT
C1
C2
Rd
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