參數(shù)資料
型號(hào): UPD7228
廠商: NEC Corp.
英文描述: 1/8, 1/16 DUTY LCD CONTROLLER/DRIVER
中文描述: 1 / 8,1 / 16稅LCD控制器/驅(qū)動(dòng)
文件頁數(shù): 44/64頁
文件大?。?/td> 314K
代理商: UPD7228
Data Sheet S10299EJ4V0DS00
44
μ
PD16434
memory addressed by the current contents of the data pointer, and the result will be stored into the same data
memory address. The data pointer is then modified, according to I
1
I
0
. Afterwards, the same operation is repeated,
each time an 8-bit data is written by the CPU.
(4) SANDM (Set AND Mode)
0
1
1
0
1
1
I
1
I
0
The data processing mode is set to the AND mode by this command. Afterwards, data processing will be
performed in the AND mode.
When this mode is set, the 8-bit data, written into the serial/parallel register by the CPU, is ANDed with the data
memory addressed by the current contents of the data pointer, and the result will be stored into the same data
memory address. The data pointer is then modified, according to I
1
I
0
. Afterwards, the same operation is repeated,
each time an 8-bit data is written by the CPU.
(5) SCML (Set Character Mode with Left entry)
0
1
1
1
0
0
0
1
The data processing mode is set to the character mode with left entry by this command. Afterwards, data
processing will be performed in the Character mode with left entry.
When this mode is set, the 8-bit data written into the serial/parallel register by the CPU is treated as ASCII or JIS
code and is decoded to 5
×
7-bit character display data by the character generator. It is written into the lower five
consecutive data memory addresses from the address indicated by the current contents of the data memory. As a
result, the data pointer contents are subtracted by 5 (
5). Afterwards, the same operation is repeated, each time
an 8-bit data is written by the CPU.
(6) SCMR (Set Character Mode with Right entry)
0
1
1
1
0
0
1
0
The data processing mode is set to the character mode with right entry by this command. Afterwards, data
processing will be performed in the character mode with right entry.
When this mode is set, the 8-bit data written into the serial/parallel register by the CPU is treated as ASCII or JIS
code and is decoded to 5
×
7-bit character display data by the character generator, and is written into the
subsequent five data memory addresses from the address indicated by the current contents of the data memory.
As a result, the data pointer contents are added by 5 (+5).
Afterwards, the same operation is repeated, each time an 8-bit data is written by the CPU.
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