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參數(shù)資料
| 型號： | UPD72871 |
| 廠商： | NEC Corp. |
| 英文描述： | IEEE1394 1-CHIP OHCI HOST CONTROLLER |
| 中文描述： | IEEE1394連接1 - OHCI主機控制器芯片 |
| 文件頁數(shù)： | 33/48頁 |
| 文件大小： | 337K |
| 代理商： | UPD72871 |
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Preliminary Data Sheet S13925EJ2V0DS00
33
μ
PD72870,72871
(3) Function Reset Status Register (FRSR) ( Base Address 1 ( 2 )+ 8H )
Bits
R/W
Description
0
R
Write Protect (No Use).
Read only as ‘0’
1
R
Ready Status (No Use).
Read only as ‘0’
2
R
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
3
R
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
4
R/W
General Wakeup Mask
14-5
R
Reserved. Read only as ‘0’
15
R/W
Interrupt
31-16
R
Reserved. Read only as ‘0’
(4) Function Force Event Register (FFER) ( Base Address 1 ( 2 )+ CH )
Bits
R/W
Description
0
R
Write Protect (No Use).
Read only as ‘0’
1
R
Ready Status (No Use).
Read only as ‘0’
2
R
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
3
R
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
4
R/W
General Wakeup Mask
14-5
-
No Use
15
R/W
Interrupt
31-16
R
Reserved. Read only as ‘0’
3.2.2 Offset_28 Cardbus CIS Pointer
This register specifies start memory address of the Cardbus CIS Area.
Bits
R/W
Description
31-0
R
Starting Pointer of CIS Area.
Constant value of 00000080H.
3.2.3 Offset_80 CIS Area
The
μ
PD72870, 72871 supports external Serial ROM(AT24C02 compatible) interface.
CIS Area Register can be loaded from external Serial ROM in the CIS area when CARD_ON are HIGH.
CARD_ON
CIS_ON
Bus
CIS
FUNCTION
0
1
PCI
OFF
PME
0
0
PCI
ON
CSTSCHG
1
X
Cardbus
ON
CSTSCHG
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