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參數(shù)資料
| 型號(hào)： | UPD72874GC-YEB |
| 廠商： | NEC Corp. |
| 英文描述： | IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER |
| 中文描述： | IEEE1394連接的OHCI 1.1標(biāo)準(zhǔn)3PORT物理層鏈路1 -芯片的主機(jī)控制器 |
| 文件頁(yè)數(shù)： | 27/40頁(yè) |
| 文件大?。?/td> | 297K |
| 代理商： | UPD72874GC-YEB |
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Preliminary Data Sheet S15306EJ2V0DS
27
μ
PD72874
3.2.1 Offset_14/18 Base Address 1/2 Register (Cardbus Status Registers)
Bits
R/W
Description
7-0
R
Constant value of 00.
31-8
R/W
-
(1) Function Event Register (FER) (Base Address 1 (2) + 0H)
Bits
R/W
Description
0
R
Write Protect (No Use).
Read only as ‘0’
1
R
Ready Status (No Use).
Read only as ‘0’
2
R
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
3
R
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
4
R/W
General Wake Up
14-5
R
Reserved. Read only as ‘0’
15
R/W
Interrupt
31-16
R
Reserved. Read only as ‘0’
(2) Function Event Mask Register (FEMR) (Base Address 1 (2) + 4H)
Bits
R/W
Description
0
R
Write Protect (No Use).
Read only as ‘0’
1
R
Ready Status (No Use).
Read only as ‘0’
2
R
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
3
R
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
4
R/W
General Wake Up Mask
5
R
BAM. Read only as ‘0’
6
R
PWM. Read only as ‘0’
13-7
R
Reserved. Read only as ‘0’
14
R/W
Wake Up Mask
15
R/W
Interrupt
31-16
R
Reserved. Read only as ‘0’
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