參數(shù)資料
型號(hào)： UPD750004GB
廠(chǎng)商： NEC Corp.
英文描述： 4 BIT SINGLE-CHIP MICROCONTROLLER
中文描述： 4位單片機(jī)
文件頁(yè)數(shù)： 15/84頁(yè)
文件大?。?/td> 719K
代理商： UPD750004GB
15
μ
PD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
4.2 SETTING OF THE STACK BANK SELECTION REGISTER (SBS)
The Mk
Ι
mode and Mk
ΙΙ
mode are switched by stack bank selection register. Fig. 4-1 shows the register
configuration.
The stack bank selection register is set with a 4-bit memory operation instruction. To use the CPU in Mk
Ι
mode,
initialize the register to 100
×
B
Note
at the beginning of the program. To use the CPU in Mk
ΙΙ
mode, initialize it to
000
×
B
Note
.
Note
Specify the desired value in
×
.
Fig. 4-1 Stack Bank Selection Register Format
Caution The CPU operates in Mk
Ι
mode after the RESET signal is issued, because bit 3 of SBS is set to 1.
Set bit 3 of SBS to 0 (Mk
ΙΙ
mode) to use the CPU in Mk
ΙΙ
mode.
SBS0
SBS1
SBS2
SBS3
0
1
2
3
F84H
Address
SBS
Symbol
0
0
0
1
Memory bank 0
Memory bank 1
Other settings are inhibited.
0
1
Mk
ΙΙ
mode
Mk
Ι
mode
Mode switching designation
Bit 2 must be set to 0.
Stack area designation
0
相關(guān)PDF資料
PDF描述
UPD750004GBA 4 BIT SINGLE-CHIP MICROCONTROLLER
UPD750006 4 BIT SINGLE-CHIP MICROCONTROLLER
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UPD750006CU 4 BIT SINGLE-CHIP MICROCONTROLLER
UPD750006CUA 4 BIT SINGLE-CHIP MICROCONTROLLER
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