
74
μ
PD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
APPENDIX A FUNCTIONS OF THE
μ
PD75008,
μ
PD750008, AND
μ
PD75P0016
Item
μ
PD75008
μ
PD750008
μ
PD75P0016
Masked ROM
0000H - 1F7FH
(8064
×
8 bits)
75X standard CPU
4 bits
×
8 or 8 bits
×
4
0.95, 1.91, 15.3
μ
s
(when operating at
4.19 MHz)
Not provided
000H - 0FFH
2-byte stack
Not available
3 machine cycles
2 machine cycles
Φ
, 524, 262, 65.5 kHz
(when the main system
clock operates at
4.19 MHz)
2 kHz
One-time PROM
0000H - 3FFFH
(16384
×
8 bits)
(1/2)
Program memory
Data memory
CPU
General-purpose register
When selecting the main
system clock
When selecting the subsys-
tem clock
SBS register
Stack area
Stack operation for a
subroutine call instruction
BRA !addr1
CALLA !addr1
MOVT XA, @BCDE
MOVT XA, @BCXA
BR BCDE
BR BCXA
CALL !addr
CALLF !faddr
Timer
Clock output (PCL)
BUZ output (BUZ)
122
μ
s (when operating at 32.768 kHz)
I
e
3 channels
Basic interval timer:
1 channel
8-bit timer/event counter:
1 channel
Clock timer: 1 channel
S
I
000H - 1FFH
(512
×
4 bits)
Masked ROM
0000H - 1FFFH
(8192
×
8 bits)
75XL CPU
(4 bits
×
8 or 8 bit
×
4)
×
4 banks
0.95, 1.91, 3.81, 15.3
μ
s (when operating at 4.19 MHz)
0.67, 1.33, 2.67, 10.7
μ
s (when operating at 6.0 MHz)
Provided
SBS.3 = 1: Mk
Ι
mode selection
SBS.3 = 0: Mk
ΙΙ
mode selection
n00H - nFFH (n = 0, 1)
Mk
Ι
mode: 2-byte stack
Mk
ΙΙ
mode: 3-byte stack
Mk
Ι
mode: Not available
Mk
ΙΙ
mode: Available
Available
Mk
Ι
mode: 3 machine cycles
Mk
ΙΙ
mode: 4 machine cycles
Mk
Ι
mode: 2 machine cycles
Mk
ΙΙ
mode: 3 machine cycles
4 channels
Basic interval timer/watchdog timer: 1 channel
8-bit timer/event counter: 1 channel
8-bit timer counter: 1 channel
Clock timer: 1 channel
Φ
, 524, 262, 65.5 kHz
(when the main system clock operates at 4.19 MHz)
Φ
, 750, 375, 93.8 kHz
(when the main system clock operates at 6.0 MHz)
2, 4, 32 kHz
(when the main system clock operates at 4.19 MHz)
2.93, 5.86, 46.9 kHz
(when the main system clock operates at 6.0 MHz)