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參數(shù)資料
| 型號： | uPD750068GT |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | 4位單晶片微控制器 |
| 文件頁數(shù)： | 54/82頁 |
| 文件大?。?/td> | 460K |
| 代理商： | UPD750068GT |
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μ
PD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
54
Data Sheet U10165EJ2V0DS00
Instruction
Group
Number
of Bytes
Number
of Machine
Cycles
Addressing
Area
Mnemonic
Operand
Operation
Skip Condition
Special
GETI
Notes 1, 2
taddr
1
3
μ
PD750064
When TBR instruction
PC
11–0
←
(taddr)
3–0
+ (taddr+1)
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
*10
When TCALL instruction
(SP–4) (SP–1) (SP–2)
←
PC
11–0
(SP–3)
←
MBE, RBE, 0, 0
PC
11–0
←
(taddr)
3–0
+ (taddr+1)
SP
←
SP–4
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
μ
PD750066, 750068
When TBR instruction
PC
12–0
←
(taddr)
4–0
+ (taddr+1)
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
When TCALL instruction
(SP–4) (SP–1) (SP–2)
←
PC
11–0
(SP–3)
←
MBE, RBE, 0, PC
12
PC
12–0
←
(taddr)
4–0
+ (taddr+1)
SP
←
SP–4
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
3
μ
PD750064
When TBR instruction
PC
11–0
←
(taddr)
3–0
+ (taddr+1)
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
*10
4
When TCALL instruction
(SP–6) (SP–3) (SP–4)
←
PC
11–0
(SP–5)
←
0, 0, 0, 0
(SP–2)
←
×
,
×
, MBE, RBE
PC
11–0
←
(taddr)
3–0
+ (taddr+1)
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
3
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
3
μ
PD750066, 750068
When TBR instruction
PC
12–0
←
(taddr)
4–0
+ (taddr+1)
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
4
When TCALL instruction
(SP–6) (SP–3) (SP–4)
←
PC
11–0
(SP–5)
←
0, 0, 0, PC
12
(SP–2)
←
×
,
×
, MBE, RBE
PC
12–0
←
(taddr)
4–0
+ (taddr+1)
SP
←
SP–6
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
3
When instruction other than TBR and
TCALL instructions
(taddr) (taddr+1) instruction is executed.
Depending on
the reference
instruction
Notes 1.
The TBR and TCALL instructions are the table definition assembler pseudo instructions of the GETI
instruction.
The operations indicated with thick lines can be performed only in the Mk II mode. The other operations
can be performed only in the Mk I mode.
2.
– – – – – – – – – – – – –
– – – – – – – – – – – – –
– – – – – – – – – – – – –
– – – – – – – – – – – – –
– – – – – – – – – – – – –
– – – – – – – – – – – – –
– – – – – – – – – – – – –
– – – – – – – – – – – – –
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