參數(shù)資料
型號: UPD750104
廠商: NEC Corp.
英文描述: 4 BIT SINGLE-CHIP MICROCONTROLLER
中文描述: 4位單片機(jī)
文件頁數(shù): 26/80頁
文件大?。?/td> 525K
代理商: UPD750104
μ
PD750104, 750106, 750108, 750104(A), 750106(A), 750108(A)
26
6.6 Clock Timer
The
μ
PD750108 contains one channel for a clock timer. The clock timer provides the following functions:
Sets the test flag (IRQW) with a 0.5 sec interval (when WM0 = 1).
The standby mode can be released by IRQW.
The 0.5 second interval can be generated from the subsystem clock (32.768 kHz).
The time interval can be made 128 times faster by selecting the fast mode. This is convenient for program
debugging, testing, etc.
Any of the frequencies (f
W
/2
4
, f
W
/2
3
, or f
W
can be output to the P23/BUZ pin. This can be used for beep and
system clock frequency trimming.
The clock can be started from zero seconds by clearing the frequency divider.
Figure 6-5. Clock Timer Block Diagram
Note
When a frequency-divided main system clock is used, 32.768 kHz cannot be selected as the source clock
frequency.
Remark
The values in parentheses in the figure above are for f
CC
= 1.0 MHz, f
XT
= 32.768 kHz.
P23/BUZ
Internal bus
8
Selector
From the
clock
generator
f
CC
128
(7.8125 kHz)
f
XT
(32.768 kHz)
Selector
Frequency divider
Selector
INTW
IRQW
set signal
WM7
0
WM5
WM4
WM3
WM2
WM1
WM0
P23 output
latch
Bit 2 of PMGB
PORT2.3
Output buffer
Clear
f
32.768 kHz
or
7.8125 kHz
Bit test instruction
Port 2 input/
output mode
WM
f
w
2
7
f
w
2
14
f
w
2
3
f
w
2
4
Note
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