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參數(shù)資料
| 型號： | UPD750106CU |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCONTROLLER |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 35/80頁 |
| 文件大小： | 525K |
| 代理商： | UPD750106CU |
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35
μ
PD750104, 750106, 750108, 750104(A), 750106(A), 750108(A)
8. STANDBY FUNCTION
The
μ
PD750108 has two different standby modes (STOP mode and HALT mode) to reduce power dissipation while
waiting for program execution.
Table 8-1. Standby Mode Statuses
Notes 1.
Operation is possible only when the main system clock operates.
2.
Operation is possible only when the noise eliminator is not selected by bit 2 of the edge detection mode
register (IM0) (when IM02 = 1).
Instruction for setting
System clock for setting
Clock oscillator
Basic interval
timer/watchdog
timer
Serial interface
Timer/event
counter
Timer counter
Clock timer
External interrupt
CPU
Release signal
STOP mode
STOP instruction
Can be set only when operating on the
main system clock.
The main system clock stops its operation.
Does not operate.
Can operate only when the external SCK
input is selected for the serial clock.
Can operate only when the TI0 pin input is
selected for the count clock.
Does not operate.
Can operate when f
XT
is selected as the
count clock.
INT1, INT2, and INT4 can operate.
Only INT0 cannot operate.
Note 2
Does not operate.
Opera-
tion
status
Item
Mode
An interrupt request signal from hardware whose operation is enabled by the interrupt
enable flag or the generation of a RESET signal
HALT mode
HALT instruction
Can be set either with the main system
clock or the subsystem clock.
Only the CPU clock
Φ
stops its operation
(oscillation continues).
Can operate only at main system clock
oscillation.
BT mode : IRQBT is set at the reference
interval.
WT mode : A reset signal is generated
when the BT overflows.
Can operate only when external SCK input
is selected as the serial clock or at main
system clock oscillation.
Can operate only when TI0 pin input is
specified as the count clock or at main
system clock oscillation.
Can operate.
Note 1
Can operate.
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