參數(shù)資料
型號(hào): UPD750106GB-XXX-3BS-MTX
廠商: NEC Corp.
英文描述: MICROCONTROLLER|4-BIT|UPD75XL CPU|CMOS|QFP|44PIN|PLASTIC
中文描述: 單片機(jī)| 4位| UPD75XL的CPU |的CMOS | QFP封裝| 44PIN |塑料
文件頁數(shù): 22/80頁
文件大小: 525K
代理商: UPD750106GB-XXX-3BS-MTX
μ
PD750104, 750106, 750108, 750104(A), 750106(A), 750108(A)
22
Figure 6-1. Clock Generator Block Diagram
Note
Instruction execution
Remarks 1.
f
CC
= Main system clock frequency
2.
f
XT
= Subsystem clock frequency
3.
Φ
= CPU clock
4.
PCC: Processor clock control register
5.
SCC: System clock control register
6.
One clock cycle (t
CY
) of the CPU clock (
Φ
) is equal to one machine cycle of an instruction.
Subsystem
clock generator
Main system
clock generator
RC oscillation
Clock timer
Basic interval timer (BT)
Timer/event counter
Timer counter
Serial interface
Clock timer
INT0 noise eliminator
Clock output circuit
1/1 to 1/4096
Frequency divider
Selec-
tor
Selec-
tor
Frequency
divider
Φ
Oscillator
disable
signal
I
HALT
Note
STOP
Note
PCC2, PCC3
clear signal
Wait release signal from BT
Standby release signal from
interrupt control circuit
RESET signal
XT1
XT2
CL1
CL2
4
SCC
SCC3
SCC0
PCC
PCC0
PCC1
PCC2
PCC3
STOP flip-flop
Q
S
R
HALT flip-flop
S
Q
R
f
XT
f
CC
1/2
1/16
1/4
1/4
WM.3
CPU
INT0 noise
eliminator
Clock
output
circuit
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