參數(shù)資料
型號: UPD75036CW
廠商: NEC Corp.
英文描述: 4 BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁數(shù): 31/58頁
文件大?。?/td> 485K
代理商: UPD75036CW
31
μ
PD75036
HALT instruction
This mode can be set when either the
main system clock or subsystem clock is
used.
Only CPU clock
Φ
is stopped (with oscilla-
tion continued).
Operation is possible only when the main
system clock is oscillated. (Sets IRQBT at
reference time intervals)
Operation is possible only when external
SCK input is selected for the serial clock or
the main system clock is oscillated.
Operation is possible only when TI0 pin
input is selected for the count count clock or
the main system clock is oscillated.
Operation is possible.
Operation is possible.
Note
Operation is possible.
Note
Interrupt request signals sent out from
hardware, which are enabled by interrupt
enable flags, or RESET input
STOP instruction
This mode can be set only when the main
system clock is used.
Only the main system clock is stopped.
Operation is stopped.
Operation is possible only when external
SCK input is selected for the serial clock.
Operation is possible only when TI0 pin input
is selected for the count clock.
Operation is possible when f
XT
is selected for
the count clock.
Operation is stopped.
Operation is stopped.
Interrupt request signals sent out from
hardware, which are enabled by interrupt
enable flags, or RESET input
Note
Operation is possible only when the main system clock operates.
8. RESET FUNCTION
The
μ
PD75036 is reset by RESET signal input.
7. STANDBY FUNCTION
To reduce the power consumption of the system waiting for a program input, the
μ
PD75036 has two standby modes
STOP and HALT modes.
Table 7-1 Standby Modes and Operation Status
STOP mode
HALT mode
Instruction for setting
System clock at setting
Clock generator
Basic interval
timer
Serial interface
Timer/event
counter
Clock timer
A/D converter
Multifunction timer
External interrupt
CPU
Release signal
INT1, INT2, and INT4 are enabled. INT0 is disabled.
Operation is stopped.
O
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