參數(shù)資料
型號: UPD75112A
廠商: NEC Corp.
英文描述: 4-Bit Single Chip-Microcomputer
中文描述: 4位單片微機(jī)
文件頁數(shù): 15/56頁
文件大?。?/td> 499K
代理商: UPD75112A
15
μ
PD75112(A), 75116(A)
Figure 5-1 Block Diagram of Clock Generator
Basic Interval Timer (BT)
Clock Generator
Timer/Event Counter
Serial Interface
Clock Output Circuit
S
R
Q
1/4
S
STOP F/F
HALT F/F
Q
R
1/2 1/16
1/8 to 1/4096
PCC
fx
fxx or
PCC0
PCC1
PCC2
PCC3
PCC2,
PCC3
Crear
STOP
*
HALT
*
4
Φ
CPU
Clock Output Circuit
Inter-
nal
Bus
System
Clock
Oscillator
Oscillation Stop
Frequency Divider
Selec-
tor
Frequency
Divider
Wait Release Signal from BT
RES(Internal Reset) Signal
Standby Release Signal from
the Interrupt Control Circuit
Remarks 1
: f
XX
=crystal/ceramic oscillator frequency.
2
: f
X
=external clock frequency.
3
:
Φ
=CPU clock
4
:
*
indicates instruction execution.
5
: PCC (processor clock control register)
6
: 1 clock cycle (t
CY)
of
Φ
is 1 michine cycle of the instruc-
tion. For t
CY
, see the AC characteristics in the
11."Elec-
trical Specifications"
.
#
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