參數(shù)資料
型號(hào)： UPD75112A
廠商： NEC Corp.
英文描述： 4-Bit Single Chip-Microcomputer
中文描述： 4位單片微機(jī)
文件頁(yè)數(shù)： 22/56頁(yè)
文件大小： 499K
代理商： UPD75112A
22
μ
PD75112(A), 75116(A)
5.8 Bit Sequential Buffer ... 16 bit
The bit sequential buffer is a special data memory for
bit control. Since this buffer can easily operate bits by
sequentially changing address and bit specifications, it
can be conveniently be used for bit-wise processing of
data having long bit lengths.
Figure 5-7 Bit Sequential Buffer Format
L = F
L = C L = B
L = 8 L = 7
L = 4 L = 3
DECS L
INCS L
L = 0
BSB0
BSB1
BSB2
BSB3
3
2
1
FC3H
0
3
2
1
FC2H
0
3
2
1
FC1H
0
3
2
1
FC0H
0
Address
Bit
Symbol
L Register
Remarks
: In pmen. @L addressing, the specified bit moves in
accordance with the L register.
5.9 Power-On Flag (Mask Option)
The power-on flag (PONF) is only set (1) when the
power-on reset circuit is activated and the power-on
reset signal is generated (see
Figure 8-1
).
PONF is mapped on bit 0 at address FD1H of the data
memory space and is manipulated by a bit manipula-
tion instruction
However, it cannot be set(1) by the SET1 instruction.
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