35
μ
PD75112(A), 75116(A)
Instructions
Mnemonic
Memory Bit
Manipulation
Branch
SET1
CLR1
SKT
SKF
SKTCLR
AND1
OR1
XOR1
BR
BRCB
BR
Operand
mem. bit
fmem. bit
pmem. @L
@H+mem. bit
mem. bit
fmem. bit
pmem. @L
@H+mem. bit
mem. bit
fmem. bit
pmem. @L
@H+mem. bit
mem. bit
fmem. bit
pmem. @L
@H+mem. bit
fmem. bit
pmem. @L
@H+mem. bit
CY, fmem. bit
CY, pmem. @L
CY, @H+mem. bit
CY, fmem. bit
CY, pmem. @L
CY, @H+mem. bit
CY, fmem. bit
CY, pmem. @L
CY, @H+mem. bit
addr
!addr
$addr
!caddr
PCDE
PCXA
No. of Bytes
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
1
2
2
2
Machine Cycle
2
2
2
2
2
2
2
2
2+S
2+S
2+S
2+S
2+S
2+S
2+S
2+S
2+S
2+S
2+S
2
2
2
2
2
2
2
2
2
3
2
2
3
3
Operation
(mem.bit)
←
1
(fmem.bit)
←
1
(pmem
7-2
+L
3-2
.bit(L
1-0
))
←
1
(H+mem
3-0
.bit)
←
1
(mem.bit)
←
0
(fmem.bit)
←
0
(pmem
7-2
+L
3-2
.bit(L
1-0
))
←
0
(H+mem
3-0
.bit)
←
0
Skip if (mem.bit)=1
Skip if (fmem.bit)=1
Skip if (pmem
7-2
+L
3-2
.bit(L
1-0
))
=
1
Skip if (H+mem
3-0
.bit)=1
Skip if (mem.bit)=0
Skip if (fmem.bit)=0
Skip if (pmem
7-2
+L
3-2
.bit(L
1-0
))=0
Skip if (H+mem
3-0
.bit)=0
Skip if (fmem.bit)=1 and clear
Skip if (pmem
7-2
+L
3-2
.bit(L
1-0
))
=1 and clear
Skip if (H+mem
3-0
.bit)=1 and clear
CY
←
CY
∧
(fmem.bit)
CY
←
CY
∧
(pmem
7-2
+L
3-2
.bit(L
1-0
))
CY
←
CY
∧
(H+mem
3-0
.bit)
CY
←
CY
∨
(fmem.bit)
CY
←
CY
∨
(pmem
7-2
+L
3-2
.bit(L
1-0
))
CY
←
CY
∨
(H+mem
3-0
.bit)
CY
←
CY
(fmem.bit)
CY
←
CY
(pmem
7-2
+L
3-2
.bit(L
1-0
))
CY
←
CY
(H+mem
3-0
.bit)
PC
13-0
←
addr
(Most appropriate instruction is
selected by assembler from among
BR !addr, BRCB !caddr and BR
$addr)
PC
13-0
←
addr
PC
13-0
←
addr
PC
13-0
←
PC
13, 12
+caddr
11-0
PC
13-0
←
PC
13-8
+DE
PC
13-0
←
PC
13-8
+XA
Addressing Area
*3
*4
*5
*1
*3
*4
*5
*1
*3
*4
*5
*1
*3
*4
*5
*1
*4
*5
*1
*4
*5
*1
*4
*5
*1
*4
*5
*1
*6
*6
*7
*8
Skip Condition
(mem.bit)=1
(fmem.bit)=1
(pmem.@L)=1
(@H+mem.bit)=1
(mem.bit)=0
(fmem.bit)=0
(pmem.@L)=0
(@H+mem.bit)=0
(fmem.bit)=1
(pmem.@L)=1
(@H+mem.bit)=1