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參數(shù)資料
| 型號(hào)： | UPD75304B |
| 廠(chǎng)商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 55/76頁(yè) |
| 文件大?。?/td> | 572K |
| 代理商： | UPD75304B |
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μ
PD75304B,75306B,75308B
55
DC CHARACTERISTICS (Ta = –40 to +85
°
C, V
DD
= 2.0 to 6.0 V) (2/2)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Ports 0, 1, 2, 3, 6
and 7 (Except P00)
V
IN
= 0 V
R
L1
V
DD
= 2.5 V
±
10%
50
600
k
Ports 4 and 5
V
OUT
= V
DD
–1.0 V
LCD drive voltage
V
LCD
2.0
V
DD
V
LCD split resistor
R
LCD
60
100
150
k
LCD output voltage
deviation
*1
(common)
V
ODC
I
O
=
±
5
μ
A
0
±
0.2
V
LCD output
voltage deviation
(segment)
V
ODS
I
O
=
±
1
μ
A
0
±
0.2
V
V
DD
= 3 V
±
10%
*4
0.4
1.2
mA
I
DDI
V
DD
= 2.5 V
±
10%
*4
0.3
0.9
mA
HALT
V
DD
= 3 V
±
10%
180
540
μ
A
I
DD2
mode
V
DD
= 2.5 V
±
10%
120
360
μ
A
V
DD
= 3 V
±
10%
40
120
μ
A
I
DD3
Supply current
*2
V
DD
= 2.5 V
±
10%
25
75
μ
A
HALT
V
DD
= 3 V
±
10%
12
36
μ
A
I
DD4
mode
V
DD
= 2.5 V
±
10%
9
27
μ
A
0.5
15
μ
A
V
DD
= 3 V
±
10%
Ta = 25
°
C
0.5
5
μ
A
I
DD5
0.4
15
μ
A
Ta = 25
°
C
0.4
5
μ
A
*
1.
The voltage deviation is the difference between the output voltage and the segment or common output
desired value (V
LCDn
; n = 0, 1, 2).
2.
Current which flows in the on-chip pull-up resistor or LCD split resistor is not included.
3.
Including oscillation of the subsystem clock.
4.
When PCC is set to 0000 and the device is operated in the low-speed mode.
5.
When the system clock control register (SCC) is set to 1001 and the device is operated on the subsystem
clock, with main system clock oscillation stopped.
R
L2
V
DD
= 2.5 V
±
10%
10
60
k
V
LCDO
= V
LCD
V
LCD1
= V
LCD
×
2/3
V
LCD2
= V
LCD
×
1/3
2.0 V
≤
V
LCD
≤
V
DD
4.19 MHz
*3
crystal oscillation
C1 = C2 = 22 pF
low-speed mode
32 kHz
*5
crystal oscillation
XT1 = 0 V
STOP mode
V
DD
= 2.5 V
±
10%
On-chip pull-up
resistor
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