參數(shù)資料
型號: UPD75306BGK
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機
文件頁數(shù): 51/76頁
文件大小: 572K
代理商: UPD75306BGK
μ
PD75304B,75306B,75308B
51
t
CY
t
TIH
,
t
TIL
t
INTH
,
t
INTL
t
CY
vs V
DD
(Operating on Main System Clock)
C
C
μ
s
Supply Voltage V
DD
[V]
0
1
2
3
4
5
6
0.5
1
2
3
4
5
30
70
6
Guaranteed
Operation Range
CPU clock
cycle time
(minimum
instruction
execution time)
*1
Interrupt input
width high/low
AC CHARACTERISTICS (Ta = –40 to +85
°
C, V
DD
= 2.7 to 6.0 V)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Operating on main
system clock
V
DD
= 4.5 to 6.0 V
0.95
64
μ
s
3.8
64
μ
s
Operating on
subsystem clock
TI0 input
frequency
V
DD
= 4.5 to 6.0 V
0
1
MHz
f
TI
0
275
kHz
TI0 input width
high/low
V
DD
= 4.5 to 6.0 V
0.48
μ
s
1.8
μ
s
INT0
*2
μ
s
INT1, 2, 4
10
μ
s
KR0 to KR7
10
μ
s
RESET width low
t
RSL
10
μ
s
114
122
125
μ
s
*
1.
The CPU clock (
Φ
) cycle time (minimum
instruction execution time) is determined by
the oscillatior frequency of the connected
resonator, the system clock control register
(SCC) and the processor clock control register
(PCC). The figure at the right indicates the
cycle time t
CY
versus supply voltage V
DD
characteristic with the main system clock
operating.
2.
2t
CY
or 128/f
X
is set by setting the interrupt
mode register (IM0).
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