參數(shù)資料
型號(hào)： UPD75512
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述： 4位單片機(jī)
文件頁(yè)數(shù)： 23/64頁(yè)
文件大?。?/td> 494K
代理商： UPD75512
μ
PD75512(A)
23
5.5
WATCH TIMER
The
μ
PD75512(A) has a built-in 1-ch watch timer. The watch timer has these functions.
Sets the test flag (IRQW) with 0.5 sec interval.
The standby mode can be released by IRQW.
0.5 second interval can be generated either from the main system clock or subsystem clock.
Time interval can be advanced to 128 times faster (3.91 ms) by setting the fast mode. This is convenient
for program debugging, test, etc.
Fixed frequency (2.048 kHz) can be output to the P23/BUZ pin. This can be used for beep and system clock
frequency trimming.
The frequency divider circuit can be cleared so that zero second watch start is possible.
WM7
0
0
0
0
WM2 WM1 WM0
Selector
Frequency divider
f
W
2
7
(256 Hz: 3.91 ms)
INTW
(IRQW
set signal)
f
W
2
14
(2 Hz
0.5 sec)
Selector
f
W
(32.768
kHz)
f
W
16
(2.048
kHz)
Clear
f
X
128
(32.768 kHz)
f
XT
(32.768 kHz)
From the
clock
generator
WM
PORT2.3
Bit 2 of PMGB
Output buffer
P23/BUZ
P23
output
latch
Port 2
input/output
mode
Bit test
instruction
8
Internal bus
Remarks:
( ) is for f
X
= 4.194304 MHz, f
XT
= 32.768 kHz.
Fig. 5-4 Watch Timer Block Diagram
5.6
TIMER/EVENT COUNTER
The
μ
PD75512(A) has a built-in 1-ch timer/event counter. The timer/event counter has these functions:
Programmable interval timer operation
Outputs square-wave signal of an arbitrary frequency to the PTO0 pin.
Event counter operation
Divides the TI0 pin input in N and outputs to the PTO0 pin (frequency divider operation).
Supplies serial shift clock to the serial interface circuit.
Count condition read out function
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