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參數(shù)資料
| 型號： | UPD77015 |
| 廠商： | NEC Corp. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16 bits, Fixed-point Digital Signal Processor |
| 中文描述： | 16位定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 1/60頁 |
| 文件大小： | 424K |
| 代理商： | UPD77015 |
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μ
PD77015, 77017, 77018 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal
processing with its demand for high speed and precision.
FEATURES
FUNCTIONS
Instruction cycle: 30 ns (MIN.)
Operation clock: 33 MHz
External clock: 33, 16.5, 8.25, 4.125 MHz
Crystal: 33 MHz
On-chip PLL to provide higher operation clock than the external clock
Dual load/store
Hardware loop function
Conditional execution
Executes product-sum operation in one instruction cycle
PROGRAMMING
16 bits
×
16 bits + 40 bits
→
40 bits multiply accumulator
8 general registers (40 bits each)
8 ROM/RAM data pointer: each data memory area has 4 registers
10 source interrupts (external: 4, internal: 6)
3 operand instructions (example: R0 = R0 +R1L
R2L)
Nonpipeline on execution stage
MEMORY AREAS
Instruction memory area : 64K words
×
32 bits
Data memory areas : 64K words
×
16 bits
×
2
(X memory, Y memory)
CLOCK GENERATOR
Mask option for CLKOUT pin:
Fixed to the low level.
Does not output the internal system clock.
Selectable source clock: external clock input and crystal resonator
[External clock]
On-chip PLL to provide higher operation clock (33 MHz MAX.) than the external clock.
Variable multiple rates (1, 2, 4, 8) by mask option.
[Crystal resonator]
Oscillation frequency corresponds directly to the system clock frequency (Sure to specify the mask option
frequency multiple as "1").
In this document, all descriptions of the
μ
PD77017 also apply to the
μ
PD77015 and
μ
PD77018, unless
otherwise specified.
MOS INTEGRATED CIRCUIT
16 bits, Fixed-point Digital Signal Processor
μ
PD77015,77017,77018
The information in this document is subject to change without notice.
The mark
shows major revised points.
Document No. U10902EJ3V0DS00 (3rd edition)
Date Published June 1997 N
Printed in Japan
1993, 1994
DATA SHEET
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