參數(shù)資料
型號(hào)： UPD77114
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT
中文描述： 馬鞍山集成電路
文件頁(yè)數(shù)： 17/62頁(yè)
文件大小： 352K
代理商： UPD77114
Data Sheet U14373EJ3V0DS
17
μ
PD77113A, 77114
2. FUNCTION OUTLINE
2.1 Program Control Unit
This unit is used to execute instructions, and control branching, loops, interrupts, the clock, and the standby mode
of the DSP.
2.1.1 CPU control
A three-stage pipeline architecture is employed and almost all the instructions, except some instructions such as
branch instructions, are executed in one system clock.
2.1.2 Interrupt control
Interrupt requests input from external pins (INT1 through INT4) or generated by the internal peripherals (serial
interface and host interface) are serviced. The interrupt of each interrupt source can be enabled or disabled.
Multiple interrupts are also supported.
2.1.3 Loop control task
A loop function without any hardware overhead is provided. A loop stack with four levels is provided to support
multiple loops.
2.1.4 PC stack
A 15-level PC stack that stores the program counter supports multiple interrupts and subroutine calls.
2.1.5 PLL
A PLL is provided as a clock generator that can multiply or divide an external clock input to supply an operating
clock to the DSP. A multiple of
×
1 to
×
16 or a division ratio of 1/1 to 1/16 can be set by a mask option.
Two standby modes are available for lowering the power consumption while the DSP is not in use.
HALT mode : Set by execution of the HALT instruction. The current consumption drops to several mA. The
normal operation mode is recovered by an interrupt or hardware reset.
STOP mode: Set by execution of the STOP instruction. The current consumption drops to several 10
μ
A. The
normal operation mode is recovered by hardware reset or WAKEUP pin
Note
.
Note
If the WAKEUP function is activated by mask option
2.1.6 Instruction memory
The capacity and type of the memory differ depending on the model of the DSP.
64 words of the instruction RAM are allocated to interrupt vectors.
A boot-up ROM that boots up the instruction RAM is provided, and the instruction RAM can be initialized or
rewritten by self boot (boot from the internal data ROM or external data space) or host boot (boot via host interface).
The
μ
PD77113A and 77114 have 3.5K-word instruction RAM and 48K-word instruction ROM.
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