參數(shù)資料
型號(hào)： UPD78324GJ
廠商： NEC Corp.
英文描述： 16/8-BIT SINGLE-CHIP MICROCONTROLLER
中文描述： 16/8-BIT單片機(jī)
文件頁數(shù)： 16/86頁
文件大?。?/td> 454K
代理商： UPD78324GJ
16
μ
PD78323, 78324
2.
CPU ARCHITECTURE
2.1
MEMORY SPACE
In the
μ
PD78324 a maximum of 64K bytes of memory can be addressed (see
Figure 2-1
).
Program fetches can be performed within the area from 0000H to FDFFH. However, when external memory expansion
is implemented in the area from FE00H to FFFFH (main RAM and special function register area), program fetches can also
be performed on this area. In this case, a program fetch is performed on the external memory, not on the main RAM or special
function registers.
(1)
Vector table area
Interrupt request from the peripheral hardware, reset input, external interrupt request and interrupt branch address by
break instruction are stored in the 0000H to 003FH 64-byte area. Generation of an interrupt request sets the even address
content of each table in the lower 8 bits of the program counter (PC) and the odd address content in the higher 8 bits.
Interrupt Source
Vector Table Address
RESET
NMI
WDT
TMF0
EXF0
EXF1
EXF2
EXF3
EXF4/CCFX0
EXF5/CCFX1
EXF6/TI
CMF00
CMF01
CMF02
CMF03
CMF10
CMF11
SRF
STF
CSIIF
ADF
Operation code trap ...................................................................
BRK
(Break instruction)...........................................
(RESET pin input) ...........................................
(NMI pin input) ................................................
(Watchdog timer) ............................................
(Realtime pulse unit).......................................
(INTP0 pin input).............................................
(INTP1 pin input).............................................
(INTP2 pin input).............................................
(INTP3 pin input).............................................
(INTP4 pin input/realtime pulse unit) .............
(INTP5 pin input/realtime pulse unit) .............
(INTP6/TI pin input) ........................................
(Realtime pulse unit).......................................
(Realtime pulse unit).......................................
(Realtime pulse unit).......................................
(Realtime pulse unit).......................................
(Realtime pulse unit).......................................
(Realtime pulse unit).......................................
(Serial receive complete)................................
(Serial send complete)....................................
(Clock synchronous serial interface)..............
(A/D converter)................................................
0000H
0002H
0004H
0006H
0008H
000AH
000CH
000EH
0010H
0012H
0014H
0016H
0018H
001AH
001CH
001EH
0020H
0024H
0026H
0028H
002AH
003CH
003EH
If bit 1 (TPF) of CPU control word (CCW) is set to 1, the 8002H to 803FH external memory area is used as an interrupt
vector table in place of 0002H to 003FH.
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