μPD78F920x ONLY) User’s Manual U18172EJ3V0UD 114 6.4.4 Square" />
參數(shù)資料
型號(hào): UPD78F9200MA-CAC-A
廠商: Renesas Electronics America
文件頁數(shù): 20/158頁
文件大小: 0K
描述: MCU 8BIT 1KB FLASH MEM 10-SSOP
標(biāo)準(zhǔn)包裝: 1
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 7
程序存儲(chǔ)器容量: 1KB(1K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 10-LSSOP(0.225",5.72mm 寬)
包裝: 托盤
其它名稱: 972-1044
UPD78F9200MA-CAC-A-ND
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00 (
μPD78F920x ONLY)
User’s Manual U18172EJ3V0UD
114
6.4.4
Square-wave output operation
Setting
The basic operation setting procedure is as follows.
<1>
Set the count clock by using the PRM00 register.
<2>
Set the CRC00 register (see Figure 6-28 for the set value).
<3>
Set the TOC00 register (see Figure 6-28 for the set value).
<4>
Set any value to the CR000 register (0000H cannot be set).
<5>
Set the TMC00 register to start the operation (see Figure 6-28 for the set value).
Caution
Changing the CR000 setting during TM00 operation may cause a malfunction. To change the
setting, refer to 6.5 Cautions Related to 16-Bit Timer/Event Counter 00 (17) Changing compare
register during timer operation.
Remarks 1. For the setting of the TO00 pin, see 6.3 (5) Port mode register 2 (PM2) and port mode control
register 2 (PMC2).
2. For how to enable the INTTM000 interrupt, see CHAPTER 10 INTERRUPT FUNCTIONS.
A square wave with any selected frequency can be output at intervals determined by the count value preset to 16-
bit timer capture/compare register 000 (CR000).
The TO00 pin output status is reversed at intervals determined by the count value preset to CR000 + 1 by setting
bit 0 (TOE00) and bit 1 (TOC001) of 16-bit timer output control register 00 (TOC00) to 1. This enables a square wave
with any selected frequency to be output.
Figure 6-28. Control Register Settings in Square-Wave Output Mode (1/2)
(a) Prescaler mode register 00 (PRM00)
ES110
0/1
ES100
0/1
ES010
0/1
ES000
0/1
3
0
2
0
PRM001
0/1
PRM000
0/1
PRM00
Selects count clock.
Setting invalid (setting “10” is prohibited.)
(b) Capture/compare control register 00 (CRC00)
7
0
6
0
5
0
4
0
3
0
CRC002
0/1
CRC001
0/1
CRC000
0
CRC00
CR000 used as compare register
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