A clock (fCPU
參數(shù)資料
型號: UPD78F9502MA-CAC-A
廠商: Renesas Electronics America
文件頁數(shù): 142/158頁
文件大?。?/td> 0K
描述: MCU 8BIT SGL CHIP
標(biāo)準(zhǔn)包裝: 400
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 7
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 10-LSSOP(0.225",5.72mm 寬)
包裝: 托盤
CHAPTER 5 CLOCK GENERATORS
User’s Manual U18172EJ3V0UD
82
5.5
Operation of CPU Clock Generator
A clock (fCPU) is supplied to the CPU from the system clock (fX) oscillated by one of the following three types of
oscillators.
High-speed internal oscillator:
Internally oscillates a clock of 8 MHz (TYP.).
Crystal/ceramic oscillator
Note 1:
Oscillates a clock of 2 MHz to 10 MHz.
External clock input circuit:
Supplies a clock of 2 MHz to 10 MHz to X1 pin
Note 2.
Notes 1.
μPD78F920x only
2.
μPD78F920x: X1 pin, μPD78F950x: EXCLK pin
The system clock oscillator is selected by the option byte. For details of the option byte, refer to CHAPTER 15
OPTION BYTE.
(1) High-speed internal oscillator
When the high-speed internal oscillation is selected by the option byte, the following is possible.
Shortening of start time
If the high-speed internal oscillator is selected as the oscillator, the CPU can be started without having to wait
for the oscillation stabilization time of the system clock. Therefore, the start time can be shortened.
Improvement of expandability
If the high-speed internal oscillator is selected as the oscillator, the X1 and X2 pins in
μPD78F920x, and the
EXCLK pin in
μPD78F950x can be used as I/O port pins. For details, refer to CHAPTER 4 PORT
FUNCTIONS.
Figures 5-8 and 5-9 show the timing chart and status transition diagram of the default start by the high-speed
internal oscillation.
Remark
When the high-speed internal oscillation is used, the clock accuracy is
±5%.
Figure 5-8. Timing Chart of Default Start by High-Speed Internal Oscillation
VDD
High-speed internal oscillation clock
PCC = 02H, PPCC = 02H
(a)
(b)
H
RESET
Internal reset
System clock
CPU clock
Option byte is read.
System clock is selected.
(Operation stops
Note)
Note Operation stop time is 277
μs (MIN.), 544 μs (TYP.), and 1.075 ms (MAX.).
<R>
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