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參數(shù)資料
| 型號(hào)： | UPD78P4038YGK |
| 廠商： | NEC Corp. |
| 英文描述： | RECTIFIER BRIDGE 2A 50V 65A-ifsm 1.1V-vf 5uA-ir KBP 35/TUBE |
| 中文描述： | 16/8-BIT單片機(jī) |
| 文件頁(yè)數(shù)： | 32/72頁(yè) |
| 文件大?。?/td> | 435K |
| 代理商： | UPD78P4038YGK |
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μ
PD78P4038Y
32
OSCILLATOR CHARACTERISTICS
(T
A
= –40 to +85
°
C, V
DD
= +2.7 to 5.5 V, V
SS
= 0 V)
Caution When using the system clock generator, run wires in the portion surrounded by broken lines
according to the following rules to avoid effects such as stray capacitance:
Minimize the wiring.
Never cause the wires to cross other signal lines.
Never cause the wires to run near a line carrying a large varying current.
Cause the grounding point of the capacitor of the oscillator circuit to have the same potential
as V
SS1
. Never connect the capacitor to a ground pattern carrying a large current.
Never extract a signal from the oscillator.
Resonator
Ceramic resonator
or crystal
External clock
Recommended Circuit
Parameter
Oscillator frequency (f
XX
)
X1 input frequency (f
X
)
X1 input rise and fall times
(t
XR
, t
XF
)
X1 input high-level and low-
level widths (t
WXH
, t
WXL
)
MIN.
4
4
0
10
MAX.
16
16
10
125
Unit
MHz
MHz
ns
ns
V
SS1
X1
X2
C2
C1
X1
X2
HCMOS
inverter
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