參數(shù)資料
型號： UPSD3254B-40U1T
廠商： 意法半導體
英文描述： Two and Three Channel Codewheels
中文描述： 閃存可編程系統(tǒng)設備與8032微控制器核心和256Kbit的SRAM
文件頁數(shù)： 163/176頁
文件大?。?/td> 1214K
代理商： UPSD3254B-40U1T
163/176
μPSD325X DEVICES
Table 129. Program, WRITE and Erase Times (5V Devices)
Symbol
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid t
Q7VQV
time units before the data byte, DQ0-DQ7, is valid for reading.
Table 130. Program, WRITE and Erase Times (3V Devices)
Symbol
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid t
Q7VQV
time units before the data byte, DQ0-DQ7, is valid for reading.
Parameter
Min.
Typ.
Max.
Unit
Flash Program
8.5
s
Flash Bulk Erase
1
(pre-programmed)
3
30
s
Flash Bulk Erase (not pre-programmed)
5
s
t
WHQV3
Sector Erase (pre-programmed)
1
30
s
t
WHQV2
Sector Erase (not pre-programmed)
2.2
s
t
WHQV1
Byte Program
14
1200
μs
Program / Erase Cycles (per Sector)
100,000
cycles
t
WHWLO
Sector Erase Time-Out
100
μs
t
Q7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)
2
30
ns
Parameter
Min.
Typ.
Max.
Unit
Flash Program
8.5
s
Flash Bulk Erase
1
(pre-programmed)
3
30
s
Flash Bulk Erase (not pre-programmed)
5
s
t
WHQV3
Sector Erase (pre-programmed)
1
30
s
t
WHQV2
Sector Erase (not pre-programmed)
2.2
s
t
WHQV1
Byte Program
14
1200
μs
Program / Erase Cycles (per Sector)
100,000
cycles
t
WHWLO
Sector Erase Time-Out
100
μs
t
Q7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)
2
30
ns
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