參數(shù)資料
型號: V370PDC-66
英文描述: DRAM Controller
中文描述: DRAM控制器
文件頁數(shù): 10/14頁
文件大小: 205K
代理商: V370PDC-66
V370PDC
10
V370PDC_A0 Data Sheet Rev 1.00 DS-PD01-0100
Copyright 1999, V3 Semiconductor Inc.
Notes:
1. Input leakage currents include high impedance output leakage for all bi-directional buffers with tri-state out-
puts.
2. Signals without pull-up resistors have greater than 3mA low output current. Signals requiring pull resistors
have greater than 6mA output current. The latter include FRAME, TRDY, IRDY, STOP, SERR, PERR.
3. Absolute maximum pin capacitance for a PCI unit is 10pF (except for CLK).
4. Lower capacitance on this input-only pin allows for non-resistive coupling to AD[xx].
3.2
Local Bus DC Specification
L
PIN
Pin inductance
20
nH
Table 8: Local Bus Signals DC Operating Specifications (V
CC
= 3.3V+ 0.3V)
Symbol
Parameter
Condition
Min
Max
Units
V
IH
Input high voltage
2.0
V
V
IL
Input low voltage
0.8
V
I
IH
Input high leakage current
V
IN
= V
CC
-10
10
μ
A
I
IL
Input low leakage current
V
IN
=GND
-10
10
μ
A
V
OH
Output high voltage
I
OUT
= -2, -8, -12mA
2.4
V
V
OL
Output low voltage
I
OUT
= 2, 8, 12mA
0.4
V
I
OZL
Low level float input leakage
V
OL
= GND
-10
10
μ
A
I
OZH
High level float input leakage
V
OH
= V
CC
-10
10
μ
A
I
CC
(max)
Maximum supply current
TBA
mA
I
CC
(typ)
Typical supply current
TBA
mA
C
IO
Input and output capacitance
TBA
pF
Table 7: PCI Bus Signals DC Operating Specifications
Symbol
Parameter
Condition
Min
Max
Units
Notes
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