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參數(shù)資料
| 型號： | V53C516400A50 |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | R/A(M) JUMPER 1.32MM 300" BLK |
| 中文描述： | 4米× 4快速頁面模式的CMOS動態(tài)隨機存儲器 |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 172K |
| 代理商： | V53C516400A50 |
MOSEL V ITELIC
1
V53C516400A
4M x 4 FAST PAGE MODE
CMOS DYNAMIC RAM
PRELIMINARY
V53C516400A Rev. 1.1 March 1998
V53C516400A
50
60
Max. RAS Access Time, (t
RAC
)
50 ns
60 ns
Max. Column Address Access Time, (t
CAA
)
25 ns
30 ns
Min. Page Mode Cycle Time, (t
PC
)
35 ns
40 ns
Min. Read/Write Cycle Time, (t
RC
)
84 ns
104 ns
Features
I
4M x 4-bit organization
I
Fast Page Mode for a sustained data rate
of 50 MHz
I
RAS access time: 50, 60 ns
I
Low power dissipation
I
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh and Hidden Refresh
I
Refresh Interval: 4096 cycles/64 ms
I
Available in 24/26-pin 300 mil SOJ,
and 24/26-pin 300 mil TSOP-II
I
Single +5V
±
10% Power Supply
I
TTL Interface
Description
The V53C516400A is a 4,194,304 x 4 bit high-
performance CMOS dynamic random access mem-
ory. The V53C516400A offers Page mode opera-
tion. The V53C516400A has asymmetric address,
12-bit row and 10-bit column.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 1024 x 4 bits,
within a page, with cycle times as short as 35ns.
These features make the V53C516400A ideally
suited for a wide variety of high performance com-
puter systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
K
T
50
60
Std.
0
°
C to 70
°
C
Blank
相關PDF資料 |
PDF描述 |
|---|---|
| V53C516400A60 | TOOLS, HAND CRIMP RoHS Compliant: Yes |
| V53C516400A | 4M x 4 Fast Page Mode CMOS Dynamic RAM(4Mx4快速頁面模式CMOS動態(tài)RAM) |
| V53C516405A50 | 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM |
| V53C516405A60 | 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM |
| V53C516405AK50 | DRAM|EDO|4MX4|CMOS|SOJ|26PIN|PLASTIC |
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