- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359326 > V54C365404VB (Mosel Vitelic, Corp.) High Performance PC100/125MHz 3.3 Volt 16M X 4 Synchronous DRAM(3.3V高性能PC100/125MHz 16Mx4同步動態(tài)RAM) PDF資料下載
參數(shù)資料
| 型號： | V54C365404VB |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | High Performance PC100/125MHz 3.3 Volt 16M X 4 Synchronous DRAM(3.3V高性能PC100/125MHz 16Mx4同步動態(tài)RAM) |
| 中文描述： | 高性能PC100/125MHz 3.3伏16米x 4同步DRAM（3.3V的高性能PC100/125MHz 16Mx4同步動態(tài)RAM）的 |
| 文件頁數(shù)： | 8/54頁 |
| 文件大?。?/td> | 475K |
| 代理商： | V54C365404VB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
8
V54C365404VB Rev. 1.1 February 1999
MOSEL V ITELIC
V54C365404VB
Burst Length and Sequence:
Burst
Length
Starting Address
(A2 A1 A0)
Sequential Burst Addressing
(decimal)
Interleave Burst Addressing
(decimal)
2
xx0
xx1
0, 1
1, 0
0, 1
1, 0
4
x00
x01
x10
x11
0, 1, 2, 3
1, 2, 3, 0
2, 3, 0, 1
3, 0, 1, 2
0, 1, 2, 3
1, 0, 3, 2
2, 3, 0, 1
3, 2, 1, 0
8
000
001
010
011
100
101
110
111
0 1 2 3 4 5 6 7
1 2 3 4 5 6 7 0
2 3 4 5 6 7 0 1
3 4 5 6 7 0 1 2
4 5 6 7 0 1 2 3
5 6 7 0 1 2 3 4
6 7 0 1 2 3 4 5
7 0 1 2 3 4 5 6
0 1 2 3 4 5 6 7
1 0 3 2 5 4 7 6
2 3 0 1 6 7 4 5
3 2 1 0 7 6 5 4
4 5 6 7 0 1 2 3
5 4 7 6 1 0 3 2
6 7 4 5 2 3 0 1
7 6 5 4 3 2 1 0
Full
Page
nnn
Cn, Cn+1, Cn+2,.....
not supported
Refresh Mode
SDRAM has two refresh modes, Auto Refresh
and Self Refresh. Auto Refresh is similar to the CAS
-before-RAS refresh of conventional DRAMs. All of
banks must be precharged before applying any re-
fresh mode. An on-chip address counter increments
the word and the bank addresses and no bank infor-
mation is required for both refresh modes.
The chip enters the Auto Refresh mode, when
RAS and CAS are held low and CKE and WE are
held high at a clock timing. The mode restores word
line after the refresh and no external precharge com-
mand is necessary. A minimum tRC time is required
between two automatic refreshes in a burst refresh
mode. The same rule applies to any access com-
mand after the automatic refresh operation.
The chip has an on-chip timer and the Self Re-
fresh mode is available. It enters the mode when
RAS, CAS, and CKE are low and WE is high at a
clock timing. All of external control signals including
the clock are disabled. Returning CKE to high en-
ables the clock and initiates the refresh exit opera-
tion. After the exit command, at least one t
is required prior to any access command.
RC
delay
DQM Function
DQM has two functions for data I/O read and write
operations. During reads, when it turns to “high” at a
clock timing, data outputs are disabled and become
high impedance after two clock delay (DQM Data
Disable Latency t
DQZ
). It also provides a data mask
function for writes. When DQM is activated, the write
operation at the next clock is prohibited (DQM Write
Mask Latency t
DQW
= zero clocks).
Suspend Mode
During normal access mode, CKE is held high en-
abling the clock. When CKE is low, it freezes the in-
ternal clock and extends data read and write
operations. One clock delay is required for mode en-
try and exit (Clock Suspend Latency t
CSL
).
Power Down
In order to reduce standby power consumption, a
power down mode is available. All banks must be
precharged and the necessary Precharge delay (trp)
must occur before the SDRAM can enter the Power
Down mode. Once the Power Down mode is initiat-
ed by holding CKE low, all of the receiver circuits ex-
cept CLK and CKE are gated off. The Power Down
mode does not perform any refresh operations,
therefore the device can’t remain in Power Down
mode longer than the Refresh period (tref) of the de-
vice. Exit from this mode is performed by taking CKE
“high”. One clock delay is required for mode entry
and exit.
Auto Precharge
Two methods are available to precharge
SDRAMs. In an automatic precharge mode, the
CAS timing accepts one extra address, CA10, to de-
termine whether the chip restores or not after the op-
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V54C365404VD | HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 |
| V54C365804VB | High Performance PC100/125MHz 3.3 Volt 8M X 8 Synchronous DRAM(3.3V高性能pc100/125MHz 8Mx8同步動態(tài)RAM) |
| V54C365804VC | HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
| V54C365804VD | HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
| V551HA40 | Varistor Products - High Energy Industrial |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V54C365404VD | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 |
| V54C365804VC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
| V54C365804VD | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
| V5-5/RK 4-0.3/0.3/0.3 | 制造商:TURCK Inc 功能描述:Cordset, Splitter, M12 Female Straight x 3, 4 Wire, 5m, PVC, Yellow, U0986-00 |
| V5-5/RK 4-1/1/1 | 制造商:TURCK Inc 功能描述:Cordset, Splitter, M12 Female Straight x 3, 4 Wire, 5m, PVC, Yellow, U-16415 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。