參數(shù)資料
型號: VFC100AG
英文描述: Synchronized VOLTAGE-TO-FREQUENCY CONVERTER
中文描述: 同步電壓頻率轉換器
文件頁數(shù): 7/15頁
文件大?。?/td> 205K
代理商: VFC100AG
VFC100
7
FIGURE 5. Circuit and Timing Diagram for Shortened Output Pulses.
R
IN
Clocked
Logic
Output
One-Shot
5
4
14
10
7
6
V
L
Clock
15
1
+V
CC
11
12
9
8
13
5V
Reference
16
+V
0.1μF
0.1μF
+V
CC
=
15VDC
–V
V
IN
C
INT
0.1μF
–V
CC
C
OS
Clock
f
OUT
Output Pulse Width Without C
OS
t
O
= 15VDC
CC
f
OUT
–V
CC
FIGURE 6. Output One-Shot Capacitor Selection.
10pF
1μF
0.1μF
0.01μF
1000pF
100pF
100ns
1μs
10μs
100μs
1ms
10ms
O
O
Nominal Output Pulse Width, t
O
t
O
input signals in many other applications, such as offsetting
the input. It can source up to 10mA and sink 100
μ
A. Heavy
loading of the reference will change the gain of the VFC and
affect the external reference voltage. For instance, a 10mA
load interacting with a 0.5
typical output impedance will
change the VFC gain equation and reference voltage by 0.1%.
Figure 7 shows the reference used to offset the VFC transfer
function, to convert a –5V to +5V input to 0–500kHz output.
The circuit in Figure 8 uses the reference to excite a 300
bridge transducer. R
1
provides the majority of the current to
the bridge while the V
REF
output supplies the balance and
accurately controls the bridge voltage. The VFC gain is
inversely proportional to the reference voltage, V
REF
. Since
the bridge gain is directly proportional to its excitation
voltage, the two equal and opposite effects cancel the effect
of reference voltage drift on gain.
The reference output amplifier is specifically designed for
excellent transient response, to provide precision in a noisy
environment.
OTHER INPUT VOLTAGE RANGES
The internal input resistor, R
IN
= 20k
, sets a full-scale
input of 10V. Other input ranges can be created by using an
external gain set resistor connected to pin 5. Since the
excellent temperature drifts of the VFC100 are achieved by
careful matching of internal temperature coefficients, use of
an external gain set resistor will generally degrade this drift.
Using an external resistor to set the gain, the resulting gain
drift would be equal to the sum of the external resistor drift
and the specified current gain drift of the VFC100. Different
voltage input ranges are best implemented by using the
internal input resistor, R
IN
, in series or parallel with a high
quality external resistor, thus maintaining as much of the
precision temperature tracking as possible.
For best drift performance, the adjustment range of a fine
gain trim should be made as narrow as practical. R
1
and R
2
in Figure 9 allow gain adjustments over a
±
1% range
(adequate to trim the 100kHz FS gain error to zero) and will
not significantly affect the drift performance of the VFC100.
R
3
, R
4
and R
5
allow trimming of the integrator amplifier
input offset voltage. The adjustment range is determined by
the ratio of R
4
to R
5
. Accurate end-point calibration would
be performed by first adjusting the offset trim so that zero
volts input just causes all output pulses to cease. The gain
trim is then adjusted for the proper full-scale output fre-
quency with an accurate full-scale input voltage.
A different input voltage range could also be made by using
only a portion of the normal input range of the VFC. For
instance, a 2V full-scale input could be created by using the
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