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參數(shù)資料
| 型號： | VP5513CG1N |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | NTSC/PAL Digital Video Encoder |
| 中文描述： | NTSC / PAL數(shù)字視頻編碼器 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大小： | 276K |
| 代理商： | VP5513CG1N |
VP5313/VP5513
11
Figure 5 REC 656 interface with HS output timing
Pixel Data Input (PD[7,0])
PXCK Input (27MHz)
Cb0
Cr0
Y0
Y1
Y2
Y3
Cb1
Cr1
HS
Nck=0
Nck=2
t
SU; PD
t
HD; PD
The horizontal line duration for PAL equates to 1728
CLK27M cycles and within each line there are 444 data bit
periods. The duration of 37 data bits (the smallest number
possible for an integer number of CLK27M cycles) therefore
equates to 144 CLK27M cycles.
To ensure that the average bit rate is 6.9375 MHz, 33 in
every 37 data bits will have a duration of 4 CLK27M cycles and
4 in every 37 data bits will have a duration of 3 CLK27M cycles.
Of the first 37 data bits in each line, bits 10, 19, 28 and 37 will
have a duration of 3 CLK27M cycles. The sequence will be
repeated for all subsequent 37 bit groups.
Master Reset
The VP5313/VP5513 must be initialised with RESET. This
is an asynchronous, active low signal and must be active for
a minimum of 200ns in order to reset the VP5313/VP5513.
The device resets to line 64, start of horizontal sync (i.e. line
blanking active). There is no on-chip power on reset circuitry.
(d) = default
xx = don’t care.
The calculation of the FREQ register value is according to the following formula:-
FREQ = 2
26
x
f
SC
/PXCK hex, where PXCK = 27.00MHz
NTSC value is rounded UP from the decimal number. PAL-B, D, G, H, I and N (Argentina) are rounded DOWN. The SC_ADJ
value is derived from the adjustment needed to be added after 8 fields to ensure accuracy of the Subcarrier frequency. Note the
SC_ADJ value of 9C required for PAL-B, D, G, H, I.
Standard
NTSC
PAL-B, G, H, I (d)
PAL-N (Argentina)
FREQ2-0
registers hex
87 C1 F1
A8 26 2B
87 DA 51
Lines/
field
525
625
625
Field
freq. HZ
59.94
50
50
1716
1728
1728
Number of
pixels/line
at 27MHz
15.734266
15.625000
15.625000
Horizontal
freq. kHz.
f
H
3.57954545
4.43361875
3.58205625
Subcarrier
freq. kHz.
f
SC
(455/2)
(1135/4+1/625)
(917/4+1/625)
f
SC
/f
H
SC_ADJ
register
hex
xx
9C
57
Table.2 Line, field and subcarrier standards and register settings
NCO Adjustment
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
18
17
19 20 21
22 23 24
4
3
4
4
3
4
TTXDD
textbit #:
TTX_REQ
TTX_DATA
CVBS/Y
Figure 4 Teletext timing diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VP5513GP1N | NTSC/PAL Digital Video Encoder |
| VP5513 | NTSC/PAL Digital Video Encoder |
| VP5513A1N | NTSC/PAL Digital Video Encoder |
| VP551DCGGP1R | Color Encoder Circuit |
| VP5313CGGP1N | Color Encoder Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VP5513CGGP1N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit |
| VP5513GP1N | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:NTSC/PAL Digital Video Encoder |
| VP551CGGP1R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit |
| VP551DCGGP1R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit |
| VP551E/CG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:NTSC/PAL Digital Video Encoder |
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