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參數(shù)資料
| 型號： | W19B322MTB9G |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PBGA48 |
| 封裝： | TFBGA-48 |
| 文件頁數(shù)： | 24/52頁 |
| 文件大小： | 1955K |
| 代理商： | W19B322MTB9G |
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W19B32XMT/B
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Notes:
1. See Bus Operations Table for details.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the autoselect command sequence, all bus cycles are write cycles.
4. Data bits DQ15-DQ8 are don’t care in command sequences, except for RD and PD.
5. Unless otherwise noted, address bits A20-A11 are don’t cares.
6. No unlock or command cycles required when bank is reading array data.
7. The Reset command is required to return to the read mode (or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 goes high (while the bank is providing status information).
8. The fourth cycle of the autoselect command sequence is a read cycle. The system must provide the bank address to
obtain the manufacturer ID, device ID, or Security Sector factory protect information. Data bits DQ15-DQ8 are don’t
care. See the Autoselect Command Sequence section for more information.
9. The data is 82h for factory locked and 02h for not factory locked.
10. The data is 00h for an unprotected sector/sector block and 01h for a protected sector/sector block.
11. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
12. The Unlock Bypass Reset command is required to return to the read mode when the bank is in the unlock bypass mode.
13. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend
mode. The Erase Suspend command is valid only during a sector erase operation, and requires the bank address.
14. The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address.
15. Command is valid when device is ready to read array data or when device is in autoselect mode.
16. See Autoselect Codes table for device ID information.
7.5.5 Write Operation Status
STATUS
DQ7
(Note 2)
DQ6
DQ5
(Note1)
DQ3
DQ2
(Note 2)
RY/#BY
Embedded Program Algorithm
#DQ7
Toggle
0
N/A
No toggle
0
Standard
Mode
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
0
Erase Suspended Sector
1
No toggle
0
N/A
Toggle
1
Erase-
Suspend
Read
Non-Erase Suspended
Sector
Data
1
Erase
Suspend
Mode
Erase-Suspend-Program
#DQ7
Toggle
0
N/A
0
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing
limits. Refer to DQ5 description section for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
3. When reading write operation status bits, the system must always provide the bank address where the Embedded
Algorithm is in progress. The device outputs array data if the system addresses a non-busy bank.
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