- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄245656 > W25Q16DWSNIP (WINBOND ELECTRONICS CORP) 16M X 1 SPI BUS SERIAL EEPROM, PDSO8 PDF資料下載
參數(shù)資料
| 型號(hào)： | W25Q16DWSNIP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 16M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 17/83頁 |
| 文件大小： | 1268K |
| 代理商： | W25Q16DWSNIP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁
W25Q16DW
- 24 -
10.2.8 Write Disable (04h)
The Write Disable instruction (Figure 7) resets the Write Enable Latch (WEL) bit in the Status Register to
a 0. The Write Disable instruction is entered by driving /CS low, shifting the instruction code “04h” into the
DI pin and then driving /CS high. Note that the WEL bit is automatically reset after Power-up and upon
completion of the Write Status Register, Erase/Program Security Registers, Page Program, Quad Page
Program, Sector Erase, Block Erase, Chip Erase and Reset instructions.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Mode 0
Mode 3
Instruction (04h)
High Impedance
/CS
CLK
Mode 0
Mode 3
0
1
Mode 0
Mode 3
IO
0
IO
1
IO
2
IO
3
04h
Instruction
Figure 7. Write Disable Instruction for SPI Mode (left) or QPI Mode (right)
10.2.9 Read Status Register-1 (05h) and Read Status Register-2 (35h)
The Read Status Register instructions allow the 8-bit Status Registers to be read. The instruction is
entered by driving /CS low and shifting the instruction code “05h” for Status Register-1 or “35h” for
Status Register-2 into the DI pin on the rising edge of CLK. The status register bits are then shifted out on
the DO pin at the falling edge of CLK with most significant bit (MSB) first as shown in Figure 8. The Status
Register bits are shown in Figure 4a and 4b and include the BUSY, WEL, BP2-BP0, TB, SEC, SRP0,
SRP1, QE, LB3-0, CMP and SUS bits (see Status Register section earlier in this datasheet).
The Read Status Register instruction may be used at any time, even while a Program, Erase or Write
Status Register cycle is in progress. This allows the BUSY status bit to be checked to determine when the
cycle is complete and if the device can accept another instruction. The Status Register can be read
continuously, as shown in Figure 8. The instruction is completed by driving /CS high.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (05h or 35h)
High Impedance
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
Status Register 1 or 2 out
**
= MSB
*
Figure 8a. Read Status Register Instruction (SPI Mode)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WS128K32-20HSQ | 512K X 8 MULTI DEVICE SRAM MODULE, 20 ns, CHIP66 |
| WMF128K8-150FEM5 | 128K X 8 FLASH 5V PROM, 150 ns, CDFP32 |
| WMF128K8-70FEC5A | 128K X 8 FLASH 5V PROM, 70 ns, CDFP32 |
| WMF128K8-120CC5 | 128K X 8 FLASH 5V PROM, 120 ns, CDIP32 |
| WMF128K8-60CI5 | 128K X 8 FLASH 5V PROM, 60 ns, CDIP32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q16DWSSIG | 功能描述:IC FLASH SPI 16MBIT 8SOIC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| W25Q16DWSSIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 16M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q16DWZPIG | 制造商:Winbond Electronics Corp 功能描述:IC FLASH 16MBIT 104MHZ 8WSON |
| W25Q16DWZPIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 16M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q16V | 制造商:WINBOND 制造商全稱:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。