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參數(shù)資料
| 型號(hào)： | W3EG7262S-JD3 |
| 英文描述： | 512MB - 2X32Mx72 DDR SDRAM UNBUFFERED |
| 中文描述： | 512MB的- 2X32Mx72 DDR SDRAM內(nèi)存緩沖 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 230K |
| 代理商： | W3EG7262S-JD3 |
W3EG7262S-D3
-JD3
8
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
May 2005
Rev. 3
PRELIMINARY
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS (continued)
0°C ≤ T
A
≤ +70°C; V
CC
= +2.5V ± 0.2V, V
CCQ
= +2.5V ± 0.2V
AC Characteristics
262
265, 202
Parameter
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
DQS write preamble
DQS write preamble setup time
DQS write postamble
Write recovery time
Internal WRITE to READ command delay
Data valid output window
REFRESH to REFRESH command interval
Average periodic refresh interval
Terminating voltage delay to V
CC
Exit SELF REFRESH to non-READ command
Exit SELF REFRESH to READ command
Symbol
t
RCD
t
RP
t
RPRE
t
RPST
t
RRD
t
WPRE
t
WPRES
t
WPST
t
WR
t
WTR
NA
t
REFC
t
REFI
t
VTD
t
XSNR
t
XSRD
Min
20
20
0.9
0.4
15
0.25
0
0.4
15
1
Max
Min
20
20
0.9
0.4
15
0.25
0
0.4
15
1
Max
Units
ns
ns
t
CK
t
CK
ns
t
CK
ns
t
CK
ns
t
CK
ns
μs
μs
ns
ns
t
CK
Notes
1.1
0.6
1.1
0.6
19
10,11
9
0.6
0.6
t
QH
-t
DQSQ
t
QH
-t
DQSQ
13
12
12
70.3
7.8
70.3
7.8
0
0
75
200
75
200
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