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參數資料
| 型號： | W532 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Frequency Multiplying, Peak Reducing EMI Solution(頻率倍增, 峰值減小EMI解決方案) |
| 中文描述： | 頻率倍增，峰值抑制EMI解決方案（頻率倍增，峰值減小電磁干擾解決方案） |
| 文件頁數： | 4/8頁 |
| 文件大小： | 114K |
| 代理商： | W532 |
W532
Document #: 38-07253 Rev. *A
Page 4 of 8
Spread Spectrum Frequency Timing
Generation
The benefits of using Spread Spectrum Frequency Timing
Generation are depicted in
Figure 2
. An EMI emission profile
of a clock harmonic is shown.
Contrast the typical clock EMI with the Cypress Spread Spec-
trum Frequency Timing Generation EMI. Notice the spike in
the typical clock. This spike can make systems fail quasi-peak
EMI testing. The FCC and other regulatory agencies test for
peak emissions. With spread spectrum enabled, the peak en-
ergy is much lower (at least 8 dB) because the energy is
spread out across a wider bandwidth.
Modulating Waveform
The shape of the modulating waveform is critical to EMI reduc-
tion. The modulation scheme used to accomplish the maxi-
mum reduction in EMI is shown in
Figure 3
. The period of the
modulation is shown as a percentage of the period length
along the X axis. The amount that the frequency is varied is
shown along the Y axis, also shown as a percentage of the
total frequency spread.
Cypress frequency selection tables express the modulation
percentage in two ways. The first method displays the spread-
ing frequency band as a percent of the programmed average
output frequency, symmetric about the programmed average
frequency. This method is always shown using the expression
f
Center
±
X
MOD
% in the frequency spread selection table.
The second approach is to specify the maximum operating
frequency and the spreading band as a percentage of this fre-
quency. The output signal is swept from the lower edge of the
band to the maximum frequency. The expression for this ap-
proach is f
MAX
–
X
MOD
%. Whenever this expression is used,
Cypress has taken care to ensure that f
MAX
will never be ex-
ceeded. This is important in applications where the clock
drives components with tight maximum clock speed specifica-
tions.
SSON# Pin
An internal pull-down resistor defaults the chip into spread
spectrum mode. When the SSON# pin is asserted (active
LOW) the spreading feature is enabled. Spreading feature is
disabled when SSON# is set HIGH (V
DD
).
Figure 2. Typical Clock and SSFTG Comparison
Figure 3. Modulation Waveform Profile
SSFTG
Typical Clock
5dB/div
A
100%
80%
60%
40%
20%
0%
–
20%
–
40%
–
60%
–
80%
–
100%
1
2
3
4
5
6
7
8
9
1
1
2
3
4
5
6
7
8
9
1
Time
F
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| W53322 | |
| W53342 | |
| W5360120A | |
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相關代理商/技術參數 |
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| W5320-T0G | 制造商:Leviton Manufacturing Co 功能描述: |
| W5320-T0W | 制造商:Leviton Manufacturing Co 功能描述: |
| W532G | 制造商:Cypress Semiconductor 功能描述:CLOCK PARTS |
| W532GI | 制造商:Rochester Electronics LLC 功能描述:TIMING DEVICE - Bulk |
| W532GIT | 制造商:Cypress Semiconductor 功能描述: |
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