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參數(shù)資料
| 型號(hào)： | W532 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Frequency Multiplying, Peak Reducing EMI Solution(頻率倍增, 峰值減小EMI解決方案) |
| 中文描述： | 頻率倍增，峰值抑制EMI解決方案（頻率倍增，峰值減小電磁干擾解決方案） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 114K |
| 代理商： | W532 |
W532
Document #: 38-07253 Rev. *A
Page 5 of 8
Absolute Maximum Ratings
[3]
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
.
Parameter
V
DD
, V
IN
T
STG
T
A
Description
Rating
–
0.5 to +7.0
–
65 to +150
0 to +70 or
–
40 to +85
–
55 to +125
0.5
Unit
V
°
C
°
C
Voltage on any Pin with Respect to GND
Storage Temperature
Operating Temperature
T
B
P
D
Ambient Temperature under Bias
Power Dissipation
°
C
W
DC Electrical Characteristics
:
0
°
C < T
A
< 70
°
C or
–
40
°
C to +85
°
C, V
DD
= 3.3V ±0.3V
Parameter
I
DD
t
ON
Description
Test Condition
Min.
Typ.
18
Max.
32
5
Unit
mA
ms
Supply Current
Power-Up Time
First locked clock cycle after Power
Good
V
IL
V
IH
V
OL
V
OH
I
IL
I
IH
I
OL
I
OH
C
I
R
P
Z
OUT
Note:
3.
4.
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Low Current
Input High Current
Output Low Current
Output High Current
Input Capacitance
Input Pull-Up Resistor
Clock Output Impedance
0.8
V
V
V
V
μ
A
μ
A
mA
mA
pF
k
2.4
0.4
2.4
–
50
Note 4
Note 4
@ 0.4V, V
DD
= 3.3V
@ 2.4V, V
DD
= 3.3V
50
15
15
7
150
25
Single Power Supply:
The voltage on any input or I/O pin cannot exceed the power pin during power-up.
Inputs OR2 and IR1:2 have a pull-up resistor, Inputs SSON# OR1 and MW have a pull-down resistor.
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