- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361789 > W65C134SQ-8 8-BIT MICROCONTROLLER PDF資料下載
參數(shù)資料
| 型號(hào)： | W65C134SQ-8 |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 12/60頁 |
| 文件大?。?/td> | 711K |
| 代理商： | W65C134SQ-8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當(dāng)前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
WESTERN DESIGN CENTER
W65C134S
March 1, 2000
7
1.7
Interrupt Flag Registers (IFR1,IFR2) ($002C,$0008)
1.7.1
A bit of these registers is set to a "1" in response to a signal from a source. Sources specified as
level-triggered assert the corresponding IFR bit if an edge occurs and is held to a "1" as long as the
IRQxB input is held low. Sources specified as edge-triggered assert the corresponding IFR bit upon
and only upon transition to the specified polarity. Note that changes for edge-triggered bits are
asynchronous with PHI2.
1.7.1.1
Read of IFR1 and IFR2
A read from an IFR register transfers its value to the internal data bus.
1.7.1.2
Write to IFR1 and IFR2
A write of a "1" to any bits of these registers disasserts those bits but has no further
effect when execution of that write instruction is completed; that is, the bit is reset by a
pulse but not held reset. A write of a "0" to any bits of these registers has no effect.
1.7.1.3
Interrupt Priority
If more than one bit of the Interrupt Flag Registers are set to a "1" and enabled, the
vector corresponding to the highest bit number asserted is used. For example, if both the
IFR10 and IFR23 were asserted and enabled, then the vector corresponding to IFR23
would be used. For another example, if both the IFR13 and IFR20 were asserted and
enabled, then the vector corresponding to IFR20 would be used.
1.8
Interrupt Enable Registers (IER1,IER2) ($002D,$0009)
IER1 and IER2 are the interrupt enable registers. Reading an IER register reads its contents and puts the
value on the internal data bus. Writing an IER writes a value from the data bus into the register. Setting a bit
in an IER to "1" permits the interrupt corresponding to the same bit in the IFR to cause a processor interrupt.
Also, if the RUN pin was low prior to the interrupt, the pin will go high if BCR3 = 0.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W65C29P-6 | I/O Controller |
| W65C29P-8 | I/O Controller |
| W65C22S8P-8 | Peripheral Interface |
| W65C22S8PL-8 | Peripheral Interface |
| W65C22S8Q-8 | Peripheral Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W65C21N6TPG-14 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| W65C21N6TPLG-14 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| W65C21S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral Interface Adapter (PIA) |
| W65C21S6TPG-14 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| W65C21S6TPLG-14 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。