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Preliminary Data Sheet
W6694A USB-ISDN S/T-Controller
-9-
Publication Release Date: May, 2001
Revision 1.03
4. PIN DESCRIPTION
TABLE 4.1 PIN DESCRIPTIONS
Note: The suffix # indicates active LOW signal.
Symbol
Pin No.
I/O
Function
USB Bus
D+
38
I/O
USB D+ data line
D-
39
I/O
USB D- data line
UCLK1
41
I
24 MHz crystal/oscillator clock input
UCLK2
42
O
24 MHz crystal clock output. Left unconnected if
use oscillator.
ISDN Signals and External Crystal
SR1
45
I
S/T bus receiver input (-). This is normal polarity.
Reverse polarity is also OK.
SR2
46
I
S/T bus receiver input (+)
SX1
48
O
S/T bus transmitter output(+)
SX2
1
O
S/T bus transmitter output(-)
XTAL1
2
I
Crystal or Oscillator clock input. The clock
frequency: 7.68MHz
±100PPM.
XTAL2
3
O
Crystal clock output. Left unconnected when using
oscillator.
GCI Bus
GCIDCL
6
I
GCI bus data clock 1.536 MHz
GCIFSC
7
I
GCI bus frame synchronization clock
GCIDD
8
I
GCI bus data downstream (input)
GCIDU
9
O
GCI bus data upstream (output)
PCM Bus
PFCK1
10
O
PCM port 1 frame synchronization signal with 8
KHz repetition rate and 8 bit pulse width
PFCK2
11
O
PCM port 2 frame synchronization signal with 8
KHz repetition rate and 8 bit pulse width
PBCK
12
O
PCM bit clock of 1.536 MHz
PTXD
15
O
PCM data output
PRXD
16
I
PCM data input
External Serial EEPROM Interface
EPCS
17
O
Serial EEPROM chip select
EPSK
18
O
Serial EEPROM data clock
EPDI
19
I
Serial EEPROM data input. Internal 10k ohm pull-
up is provided.
EPDO
20
O
Serial EEPROM data output
Power and Ground
VDD1,VSS1
47,44
I
ISDN S/T analog power (5V), Ground
VDD21,VSS21
VDD22,VSS22
5,4
14,13
I
Digital power (5V), Ground