參數(shù)資料
型號(hào)： W741C250
英文描述： 4-Bit Microcontroller
中文描述： 4位微控制器
文件頁數(shù)： 19/88頁
文件大?。?/td> 449K
代理商： W741C250
W741C250
Publication Release Date: March 1998
- 19 -
Revision A4
Reset Function, continued
Output port RE
High
RA & RB ports output type
CMOS type
RC & RD ports pull-high resistors
Disabled
Input clock of the watchdog timer
F
OSC
/1024
LCD display
OFF
Segment output mode
LCD drive output
External INT
The external interrupt
INT
pin contains a pull-up resistor. When the HEF.4 or IEF.4 flag is set, the
falling edge of the
INT
pin will execute the hold mode release or interrupt subroutine. A low level on
the
INT
pin will release the stop mode.
Input/Output Ports RA, RB
Port RA consists of pins RA.0 to RA.3 and port RB consists of pins RB.0 to RB.3. After initial reset,
input/output ports RA and RB are both in input mode. When RA and RB are used as output ports,
CMOS or NMOS open drain output type can be selected by the PM0 register. Each pin of port RA or
RB can be specified as input or output mode independently by the PM1 and PM2 registers. The
MOVA R, RA or MOVA R, RB instructions operate the input functions and the MOV RA, R or MOV
RB, R operate the output functions. For more details, refer to the instruction table and Figure 9.
I/O PIN
RA.n(RB.n)
DATA
BUS
Buffer
Output
PM0.0 (or PM0.1)
PM1.n
(or PM2.n)
MOVA R, RA
(or MOVA R, RB)
instruction
MOV RA, R
(or MOV RB, R)
Instruction
Enable
Enable
V
Input/Output Pin of the RA(RB)
DD
Figure 9. Architecture of Input/Output Pins
Input Ports RC, RD
Port RC consists of pins RC.0 to RC.3, and port RD consists of pins RD.0 to RD.3. Each pin of port
RC and port RD can be connected to a pull-up resistor, which is controlled by the port mode 0 register
(PM0). When the PEF, HEF, and IEF corresponding to the RC port are set, a signal change on the
specified pins of port RC will execute the hold mode release or interrupt subroutine. Port status
register 0 (PSR0) records the status of ports RC, i.e., any signal changes on the pins that make up
the port. PSR0 can be read out and cleared by the MOV R, PSR0, and CLR PSR0 instructions. In
addition, the falling edge signal on the pin of port RC specified by the instruction MOV SEF, #I will
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